Vertical MIM Capacitors via Damascene Fabrication
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Solution Overview
Problem
Conventional methods for fabricating metal-insulator-metal (MIM) capacitors in semiconductor integrated circuits face challenges such as high series resistance, instability in high-frequency circuits, limited effective electrode area, and process complexity due to the use of silicon layers and the need for multiple lithography steps, which restricts flexibility and increases costs.
Innovation Solution
A method integrating vertical MIM capacitors with the damascene process, involving the formation of a column core electrode, a fenced insulation layer, and a concentric circular outer electrode, where conductive plugs connect in the same direction, reducing the number of layers conductive plugs must cross and eliminating the need for additional photomasks, thus simplifying the process and increasing capacitance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of moving object
If planar-type MIM capacitors are fabricated using conventional methods, then the fabrication process can be integrated with damascene process, but the effective electrode area is limited and wafer space is insufficient for high-density integration
Solution Approach 1:
The patent transitions from planar-type capacitors to vertical MIM capacitors, utilizing the vertical dimension to increase effective electrode area. The vertical structure allows capacitors to extend through multiple layers (e.g., through IMD layers) rather than being confined to a single plane, thereby increasing capacitance per unit wafer area and enabling high-density integration.
2Manufacturing precision
If multiple lithography steps are used to fabricate planar-type MIM capacitors, then the capacitor structure can be formed, but the process complexity increases and photomask costs increase
Solution Approach 1:
The patent combines the capacitor fabrication process with the existing damascene process flow, integrating capacitor electrode formation into the interconnect fabrication sequence. This merging eliminates the need for separate lithography steps and photomasks that would otherwise be required for planar capacitor fabrication, thereby reducing process complexity and photomask costs while maintaining manufacturing precision.
3Reliability
If conventional interconnect spacing of 1000 Å is maintained, then shorts between interconnects are avoided, but the available wafer area for capacitor fabrication is substantially reduced
Solution Approach 1:
By adopting vertical capacitor structures, the patent enables capacitors to occupy the vertical space between interconnect layers rather than requiring additional horizontal spacing. This allows interconnects to be placed closer together in the planar direction while maintaining the 1000 Å spacing requirement, thereby increasing the available wafer area for capacitor fabrication without compromising reliability.
4Manufacturing precision
If silicon layers are used as capacitor electrodes, then the capacitor structure can be formed, but series resistance increases and stability in high frequency circuits deteriorates
Solution Approach 1:
The patent changes the material parameter of the capacitor electrodes from silicon to metal (such as copper or aluminum). This material substitution fundamentally alters the electrical properties, reducing series resistance and improving high-frequency stability while maintaining the ability to form capacitor structures through standard semiconductor fabrication processes.
Data Source
AI summary
A method of fabricating a vertical MIM capacitor. An insulation layer is formed on the substrate. The insulation layer is patterned to form an opening in a predetermined area of a core electrode. Then, the opening is filled to form a sacrificial plug. Subsequently, the insulation layer is patterned to form a trench in a predetermined area of an outer electrode around the sacrificial plug. A fenced insulation layer is formed around the sacrificial plug simultaneously. After the sacrificial plug is removed, a metal layer is filled in the predetermined area of the core and outer electrodes. A vertical MIM capacitor comprising the core electrode, the fenced insulation layer, and the outer electrode is finally formed. The invention also provides a vertical MIM capacitor.