Vertical MOS Chip Support Structure for Warp and Strength Control
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Solution Overview
Problem
The vertical MOS transistor in a dual configuration has a large area in a plan view, leading to increased warp and decreased strength of the semiconductor chip due to a thin semiconductor substrate and thick metal layer, which affects on resistance and mounting reliability.
Innovation Solution
A semiconductor device with a facedown mountable configuration, featuring a semiconductor substrate, low-concentration impurity layers, vertical MOS transistors, a metal layer, and a support bonded via an adhesive, where the support is larger in area and thickness than the semiconductor layer, and the adhesive does not reach the top face of the semiconductor layer, resulting in a curved semiconductor chip shape that mitigates warp and increases strength.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the semiconductor substrate is made thin and the metal layer is made thick to reduce on resistance, then the on resistance is reduced, but the warp of the semiconductor chip increases and the strength decreases
Solution Approach 1:
The patent divides the semiconductor chip structure into distinct functional layers: a thin semiconductor substrate for low on-resistance, a thick metal layer for conduction, and a separately bonded support structure for mechanical strength. This segmentation allows each layer to be optimized independently for its specific function without compromising the others.
Solution Approach 2:
The patent introduces a support structure (rigid metal plate or ceramic substrate) bonded to the back surface of the semiconductor chip via conductive adhesive as an intermediary element. This support acts as a mediator that provides mechanical strength and reduces warp without interfering with the electrical function of the thin semiconductor substrate and thick metal layer.
2Reliability
If the area of the semiconductor chip is increased to reduce on resistance, then the on resistance is reduced, but the warp of the semiconductor chip increases
Solution Approach 1:
The patent uses the support structure bonded to the back surface as a counterweight to balance the warp tendency caused by the large-area thin semiconductor substrate and thick metal layer. The support provides opposing mechanical force that compensates for the warp, allowing large chip area to be maintained without excessive deformation.
3Stability of the object's composition
If a rigid metal plate is bonded via conductive adhesive to reduce warp, then the warp is reduced, but the area of the rigid metal plate increases the overall device size
Solution Approach 1:
The patent applies partial bonding where the conductive adhesive is applied only to specific regions (such as peripheral areas or discrete bonding points) rather than covering the entire surface. This provides sufficient warp control while minimizing the area occupied by the support structure and adhesive, thus reducing overall device size.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The configuration reduces on resistance and enhances the strength of the semiconductor chip while minimizing warp, ensuring reliable mounting and preventing short-circuits by controlling the adhesive protrusion and support size.
Implementation Method 1
a support that is bonded to a back face side of the metal layer via an adhesive
Implementation Method 2
the semiconductor chip is in a curved shape that projects in a direction toward the support
Data Source
AI summary
A semiconductor device includes: a semiconductor layer; first and second vertical MOS transistors provided in the semiconductor layer; a metal layer connected to and in contact with an entire surface on a back face side of the semiconductor layer; and a support bonded to a back face side of the metal layer via an adhesive. In a plan view, the support is larger in area than the semiconductor layer and encompasses the semiconductor layer. A thickness of the support is greater than a thickness of the semiconductor layer. In a cross-sectional view, a height of the adhesive along a lateral face of the semiconductor layer does not reach a top face of the semiconductor layer. In the cross-sectional view, a semiconductor chip resulting from excluding the support and the adhesive from the semiconductor device is in a curved shape that projects in a direction toward the support.