Vertical MOS Rectifier Multi-Trench Segmentation
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Solution Overview
Problem
Conventional trench-MOS Schottky barrier diodes face issues with stress-induced damage during reliability tests and potential malfunction due to stress-related cracks, which affect their reverse-biased leakage current and forward voltage drop characteristics.
Innovation Solution
A method for manufacturing a rectifier with a vertical MOS structure involving the formation of multi-trench structures, gate oxide layers, polysilicon structures, and ion implantation to create doped regions, with a metal sputtering layer and mask layer processing to minimize leakage current and optimize electrical properties.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Object-generated harmful factors
If a trench-MOS Schottky barrier diode is manufactured using conventional single-trench structures, then the reverse-biased leakage current is reduced, but stress-induced damage and cracks occur during reliability tests
Solution Approach 1:
The patent divides a single deep trench into multiple shallower trenches arranged in parallel. This segmentation reduces the stress concentration that occurs in single deep trenches while maintaining the effective area for blocking reverse leakage current. The multiple trenches distribute the mechanical stress more evenly across the device structure.
Solution Approach 2:
The patent transitions from a single-dimensional deep trench structure to a multi-dimensional array of shallower trenches. By arranging trenches in both vertical and horizontal dimensions, the device achieves better stress distribution while maintaining electrical performance.
2Strength
If the trench depth is increased to improve reverse voltage tolerance, then the reverse voltage capability is enhanced, but stress-induced cracks and device malfunction increase
Solution Approach 1:
Instead of increasing the depth of a single trench, the patent segments the reverse voltage blocking function across multiple shallower trenches. The combined effect of multiple trenches achieves the required reverse voltage tolerance without the excessive stress concentration that would occur in a single deep trench.
Solution Approach 2:
The patent optimizes the local properties of each individual trench by keeping them shallower, while the collective arrangement of multiple trenches provides the overall reverse voltage tolerance. Each local region (individual trench) has optimized stress characteristics, while the global structure provides the required electrical performance.
3Ease of manufacture
If conventional manufacturing processes are used for trench-MOS diodes, then the manufacturing process is relatively simple, but the device exhibits high stress and potential malfunction
Solution Approach 1:
The manufacturing process is segmented into standard photolithography and etching steps that can be integrated into existing production lines. The multi-trench pattern is created using conventional lithographic techniques, maintaining ease of manufacture while improving device reliability.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The resulting rectifier exhibits low reverse-biased leakage current, low forward voltage drop, high reverse voltage, and fast reverse recovery time, addressing the limitations of conventional diodes while minimizing stress-related issues.
Implementation Method 1
forming a gate oxide layer on a surface of the second multi-trench structure
Implementation Method 2
forming a metal sputtering layer on the doped regions, the gate oxide layer, the polysilicon structure and the first mask layer
Implementation Method 3
performing an ion implantation process to dope a region between the semiconductor substrate and the second multi-trench structure, thereby forming a plurality of doped regions in the semiconductor substrate
Data Source
AI summary
A method for manufacturing a rectifier with a vertical MOS structure is provided. A first multi-trench structure and a first mask layer are formed at a first side of the semiconductor substrate. A second multi-trench structure is formed in the second side of the semiconductor substrate. A gate oxide layer, a polysilicon structure and a metal sputtering layer are sequentially formed on the second multi-trench structure. The rectifier further includes a wet oxide layer and a plurality of doped regions. The wet oxide layer is formed on a surface of the first multi-trench structure and in the semiconductor substrate. The doping regions are formed on a region between the semiconductor substrate and the second multi-trench structure, and located beside the mask layer. The metal sputtering layer is formed on the first mask layer corresponding to the first multi-trench structure.


