Vertical MOS Trench Gate With Segmented Field Plates

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Solution Overview

Problem

Vertical MOS transistors with trench gates face challenges in supporting high operating voltages due to the inability of the gate dielectric layer to withstand high electric fields, leading to increased resistance in the channel region and deeper trenches, which are costly to fabricate.

Innovation Solution

The implementation of a semiconductor device with a vertical MOS transistor featuring trenches with field plates and a dielectric liner that is thicker on the lower segment than the upper segment, allowing for a RESURF configuration that maintains an electric field at a desired value, reducing trench depth and fabrication costs.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the gate dielectric layer thickness is increased to support high electric fields, then the transistor can withstand higher operating voltages, but the resistance of the channel region increases undesirably

Engineering Contradiction:
Improvewithstand high electric fieldVSAvoidchannel resistance
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The dielectric liner is configured with varying thickness at different locations: a first thickness in the drift region and a second thickness (greater than the first) in the channel region. This local quality variation allows the drift region to withstand high electric fields while maintaining low channel resistance, resolving the contradiction between high voltage capability and low on-state resistance.

Inventive Principle:
Principle #3Local quality

2Reliability

If the trenches are made deeper to support desired operating voltage, then the transistor can handle higher voltages, but the fabrication cost increases

Engineering Contradiction:
Improveoperating voltage supportVSAvoidfabrication cost
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

The dielectric liner provides localized electrical field management in the drift region, enabling shallower trench depths while maintaining high voltage capability. This reduces fabrication complexity and cost compared to uniformly deep trenches required by conventional structures.

Inventive Principle:
Principle #3Local quality

3Reliability

If the dielectric liner thickness is increased in the drift region, then the electric field is better controlled, but the trench depth must increase

Engineering Contradiction:
Improveelectric field controlVSAvoidtrench depth
Core Design Contradiction:
ReliabilityVSLength of stationary object

Solution Approach 1:

The dielectric liner has a first thickness in the drift region and a second greater thickness in the channel region. This localized thickness variation provides effective electric field control in the drift region without requiring increased overall trench depth, as the thicker portion is confined to the channel region where it serves dual purposes.

Inventive Principle:
Principle #3Local quality

4Object-affected harmful factors

If the gate dielectric layer is made thinner to reduce channel resistance, then on-state performance improves, but the transistor cannot withstand high electric fields

Engineering Contradiction:
Improvechannel resistanceVSAvoidwithstand high electric field
Core Design Contradiction:
Object-affected harmful factorsVSReliability

Solution Approach 1:

The dielectric liner provides spatially differentiated protection: a thinner first thickness in the drift region allows for better field management, while a thicker second thickness in the channel region ensures adequate insulation and breakdown voltage. This resolves the contradiction by providing location-specific dielectric properties.

Inventive Principle:
Principle #3Local quality

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This configuration enhances on-state current and current density while reducing trench depth, thereby lowering fabrication costs and improving the transistor's performance.

Implementation Method 1

maintains an electric field at a desired value

Methodology Applied
Scientific EffectElectric Field: Electric Field

Implementation Method 2

A dielectric liner in the trenches separating the field plates from the drift region has a thickness greater than a gate dielectric layer

Methodology Applied
Scientific EffectDielectric: Dielectric

Data Source

PatentUS10541326B2Multiple shielding trench gate FET
Publication Date: 2020.01.21 TEXAS INSTRUMENTS INC
  • US10541326B2 patent drawing
  • US10541326B2 patent drawing
  • US10541326B2 patent drawing

AI summary

A semiconductor device contains a vertical MOS transistor having a trench gate in trenches extending through a vertical drift region to a drain region. The trenches have field plates under the gate; the field plates are adjacent to the drift region and have a plurality of segments. A dielectric liner in the trenches separating the field plates from the drift region has a thickness great than a gate dielectric layer between the gate and the body. The dielectric liner is thicker on a lower segment of the field plate, at a bottom of the trenches, than an upper segment, immediately under the gate. The trench gate may be electrically isolated from the field plates, or may be connected to the upper segment. The segments of the field plates may be electrically isolated from each other or may be connected to each other in the trenches.