Vertical MOSFET Wrap-Around Gate Radial Segmentation

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Solution Overview

Problem

The continuous scaling of MOSFET gate length in III-V MOSFETs integrated on Si substrates leads to increased off-state power consumption due to leakage currents, and there is a need for improved device performance to reduce parasitic capacitances and leakage currents in vertical nanowire MOSFETs.

Innovation Solution

A vertical metal oxide semiconductor field effect transistor (MOSFET) design featuring a wrap-around gate with a field plate portion and a gate portion, where the field plate is arranged at a larger radial distance from the nanowire center than the gate portion, increasing the tunneling distance and effectively reducing leakage currents and output conductance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If the gate length is continuously scaled down to improve device performance, then the drive current and transconductance are improved, but the off-state power consumption increases due to leakage currents

Engineering Contradiction:
Improvedrive currentVSAvoidoff-state power consumption
Core Design Contradiction:
ProductivityVSLoss of energy

Solution Approach 1:

The gate electrode is segmented into two distinct portions: a gate portion closer to the nanowire center for strong channel control, and a field plate portion at larger radial distance for leakage suppression. This segmentation allows each portion to perform its specialized function independently, resolving the contradiction between drive current and leakage current.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Different regions of the gate structure are assigned different functional qualities: the gate portion provides high electric field for strong inversion layer formation (improving drive current), while the field plate portion provides extended field control at larger radius (suppressing leakage). This local differentiation of functional quality resolves the performance contradiction.

Inventive Principle:
Principle #3Local quality

2Device complexity

If a conventional gate structure is used, then the device structure is simple, but the parasitic capacitances are high and leakage currents are not sufficiently reduced

Engineering Contradiction:
Improvegate structureVSAvoidparasitic capacitance
Core Design Contradiction:
Device complexityVSObject-generated harmful factors

Solution Approach 1:

The gate structure transitions from a conventional planar configuration to a three-dimensional wrap-around configuration with radial positioning. The field plate portion extends to a larger radial distance from the nanowire center, creating a multi-dimensional electric field distribution that reduces parasitic capacitance between gate and drain/source regions.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

3Ease of operation

If the gate is positioned closer to the nanowire center, then the control over charge transport is improved, but the tunneling leakage current increases

Engineering Contradiction:
Improvecharge transport controlVSAvoidtunneling leakage current
Core Design Contradiction:
Ease of operationVSObject-generated harmful factors

Solution Approach 1:

The gate electrode is divided into spatially separated portions: the gate portion at smaller radial distance provides strong control over charge transport in the channel, while the field plate portion at larger radial distance creates an extended depletion region that suppresses tunneling leakage. This spatial segmentation resolves the contradiction between control strength and leakage suppression.

Inventive Principle:
Principle #1Segmentation

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This design enhances control over charge transport, increases breakdown voltage, suppresses tunneling leakage current, and allows for higher operating voltages while reducing off-state power consumption by tailoring the electric field and bandgap along the nanowire.

Implementation Method 1

the field plate portion is arranged at a first radial distance from the center of the nanowire and the gate portion is arranged at a second radial distance from the center of the nanowire, wherein the first radial distance is larger than the second radial distance... suppresses the tunneling leakage current

Methodology Applied
Scientific EffectTunneling: Franz-Keldysh Effect

Data Source

PatentUS11621346B2Vertical metal oxide semiconductor field effect transistor (MOSFET) and a method of forming the same
Publication Date: 2023.04.04 C2AMPS AB
  • US11621346B2 patent drawing
  • US11621346B2 patent drawing
  • US11621346B2 patent drawing

AI summary

A vertical metal oxide semiconductor field effect transistor (MOSFET) and a method for forming a vertical MOSFET is presented. The MOSFET comprises: a top contact; a bottom contact; a nanowire (602) forming a charge transport channel between the top contact and the bottom contact; and a wrap-around gate (650) enclosing the nanowire (602) circumference, the wrap-around gate (650) having an extension spanning over a portion of the nanowire (602) in a longitudinal direction of the nanowire (602), wherein the wrap-around gate (650) comprises a gate portion (614) and a field plate portion (616) for controlling a charge transport in the charge transport channel, and wherein the field plate portion (616) is arranged at a first radial distance (636) from the center of the nanowire (602) and the gate portion (614) is arranged at a second radial distance (634) from the center of the nanowire (602); characterized in that the first radial distance (636) is larger than the second radial distance (634).