Vertical Non-Volatile Memory Device With Segmented Control Gates
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Solution Overview
Problem
The integration density of semiconductor memory devices needs to be increased to accommodate growing data processing demands in smaller electronic devices, which existing flat structure non-volatile memory devices cannot efficiently achieve.
Innovation Solution
A non-volatile memory device with a vertical structure is developed, featuring a semiconductor layer, sidewall insulation layers with protrusion regions, and control gate electrodes of varying widths and locations, along with a method of fabrication that includes alternating interlayer insulation and sacrificial layers to form channel regions and storage structures.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If a conventional flat structure is used for non-volatile memory devices, then the device structure is simple and easy to manufacture, but the integration density cannot be increased to accommodate growing data processing demands
Solution Approach 1:
The patent transitions from a conventional planar (2D) memory structure to a vertical (3D) structure by stacking multiple layers including semiconductor layers, insulation layers, and control gate electrodes in the vertical direction. This dimensional change enables significantly higher integration density by utilizing the third dimension (height) for storing more memory cells within the same footprint area.
Solution Approach 2:
The vertical structure is divided into multiple discrete layers and components including alternating semiconductor layers and insulation layers, with control gate electrodes segmented into first and second control gate electrodes positioned at different heights. This segmentation allows for independent control and optimization of different memory cell regions while maintaining high integration density.
2Productivity
If control gate electrodes are made with uniform width in vertical structure, then the fabrication process is simpler, but signal transmission and data storage efficiency are limited
Solution Approach 1:
The control gate electrodes are designed with non-uniform widths where first control gate electrodes and second control gate electrodes have different width dimensions. This local variation in geometry allows optimization of electrical characteristics for different functional regions, improving signal transmission and data storage efficiency by adapting the gate electrode dimensions to specific operational requirements at different vertical positions.
Data Source
AI summary
A non-volatile memory device having a vertical structure includes a semiconductor layer, a sidewall insulation layer extending in a vertical direction on the semiconductor layer, and having one or more protrusion regions, first control gate electrodes arranged in the vertical direction on the semiconductor layer, and respectively contacting one of portions of the sidewall insulation layer where the one or more protrusion regions are not formed and second control gate electrodes arranged in the vertical direction on the semiconductor layer, and respectively contacting one of the one or more protrusion regions.