Vertical OLED Transistor Gate Electrode Integration

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Solution Overview

Problem

The manufacturing process for displays using vertical organic light-emitting transistors is more complex and costly compared to conventional organic light-emitting diodes, with increased time and cost due to additional processes required for forming gate electrodes and gate insulating film layers, which hinders the production of high-brightness displays with wider light-emitting areas.

Innovation Solution

A manufacturing method where the gate electrode layer of the vertical organic light-emitting transistor and the current-carrying electrode layer of the thin-film transistor are formed integrally on the same layer, reducing the number of processes and eliminating the need for contact holes, thereby minimizing manufacturing time and cost while maintaining a wider light-emitting area.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If the gate electrode layer of the vertical organic light-emitting transistor and the current-carrying electrode layer of the thin-film transistor are formed separately, then the manufacturing precision is improved, but the manufacturing time and cost increase

Engineering Contradiction:
Improveelectrode layer formation precisionVSAvoidmanufacturing time
Core Design Contradiction:
Manufacturing precisionVSProductivity

Solution Approach 1:

The gate electrode layer of the vertical organic light-emitting transistor and the current-carrying electrode layer of the thin-film transistor are formed integrally in the same layer, combining two separate formation processes into one. This reduces manufacturing time and cost while maintaining precision through unified formation

Inventive Principle:
Principle #5Merging (Combining)

2Reliability

If contact holes are formed to connect the gate electrode and current-carrying electrode, then the electrical connection is improved, but the light-emitting area is reduced

Engineering Contradiction:
Improveelectrical connectionVSAvoidlight-emitting area
Core Design Contradiction:
ReliabilityVSArea of moving object

Solution Approach 1:

By forming the gate electrode and current-carrying electrode in the same layer integrally, the patent eliminates the need for contact holes that would otherwise be required to connect different layers. This maintains electrical connection reliability while preserving maximum light-emitting area

Inventive Principle:
Principle #5Merging (Combining)

3Reliability

If additional gate insulating film layers are formed, then the device functionality is improved, but the manufacturing cost increases

Engineering Contradiction:
Improvedevice functionalityVSAvoidmanufacturing cost
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

The gate insulating film layer is formed once and serves multiple functions: it acts as the gate insulator for the vertical organic light-emitting transistor and simultaneously serves as the insulating layer for the thin-film transistor structure. This multi-functional approach reduces the total number of layers and manufacturing cost

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS20240090262A1Manufacturing method of display and display
Publication Date: 2024.03.14 JSR CORPORATION
  • US20240090262A1 patent drawing
  • US20240090262A1 patent drawing
  • US20240090262A1 patent drawing

AI summary

Provided is a manufacturing method of a display including a vertical organic light-emitting transistor in which a wider light-emitting area is secured while manufacturing time and manufacturing cost are suppressed. In the manufacturing method of the display including the vertical organic light-emitting transistor, a gate electrode layer of the vertical organic light-emitting transistor and one of current-carrying electrode layers of a thin-film transistor connected to the gate electrode layer of the vertical organic light-emitting transistor are formed integrally in the same layer.