Vertical 3D OTS Memory Voltage Biasing for Leakage Reduction
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Current methods for operating vertical 3D OTS memory devices face electrical issues such as leakage current.
Innovation Solution
A method for operating a memory device with stacked first and second electrodes and memory layers, where selected electrodes are applied with specific voltage combinations to reduce leakage current, including applying −⅔ V to a selected second electrode, ⅓ V to a selected first electrode, and 0 V to unselected electrodes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional voltage schemes are applied to vertical 3D OTS memory, then memory operation is achieved, but leakage current increases
Solution Approach 1:
The patent applies a modified 1/3 V voltage scheme where unselected first electrodes are biased at 0V instead of the conventional −1/3 V. This parameter change in the voltage applied to unselected electrodes effectively suppresses leakage current while maintaining proper memory cell operation, directly resolving the contradiction between reliability and harmful leakage current.
2Quantity of substance
If memory device height is increased to improve capacity, then storage density improves, but leakage current increases
Solution Approach 1:
By changing the voltage parameter for unselected first electrodes to 0V in the modified 1/3 V scheme, the patent enables scaling to taller memory structures with more layers without the leakage current penalty that would normally accompany increased device height and layer count.
3Productivity
If conventional operating methods are used, then memory functionality is maintained, but power consumption increases
Solution Approach 1:
The modified 1/3 V scheme changes the voltage parameter for unselected electrodes to 0V, which reduces the overall power consumption of the memory device while maintaining full operational functionality through the optimized voltage distribution across the electrode structure.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The method effectively reduces leakage current, improves electrical reliability, and reduces power consumption while maintaining performance even with increased memory height.
Implementation Method 1
1/3 V is applied to a selected first electrode in the first electrodes, and the selected first electrode is in electrical contact with the selected memory cell. −2/3 V is applied to a selected second electrode in the second electrodes, and the selected second electrode is in electrical contact with the selected memory cell.
Implementation Method 2
0 V is applied to unselected first electrodes in the first electrodes. 0 V is applied to unselected second electrodes in the second electrodes.
Data Source
AI summary
A method for operating a memory device includes following steps. A memory device including a plurality of first electrodes, a plurality of second electrodes and a plurality of memory layers is provided, and a plurality of memory cells are formed at intersections between the first electrodes, the second electrodes and the memory layers. A selected memory cell is selected in the memory cells. −⅔ V is applied to a selected second electrode in the second electrodes, and the selected second electrode is in electrical contact with the selected memory cell. ⅓ V is applied to a selected first electrode in the first electrodes, and the selected first electrode is in electrical contact with the selected memory cell. 0 V is applied to unselected second electrodes in the second electrodes. 0 V is applied to unselected first electrodes in the first electrodes.


