Vertical Oxide Semiconductor Channel Stack for High-Capacity Memory
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Solution Overview
Problem
Current semiconductor devices face challenges in increasing data storage capacity while maintaining efficient electrical characteristics, particularly in the integration of high-capacity memory cells with low-temperature processing and reduced grain boundary effects.
Innovation Solution
A semiconductor device is designed with a vertical channel structure featuring a stacked channel layer composed of n-type and p-type oxide semiconductor materials, along with a gate insulating layer, tunneling dielectric layer, and blocking dielectric layer, which enhances data storage capacity and electrical performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a vertical channel structure with stacked oxide semiconductor layers is used, then data storage capacity and electrical performance are improved, but device complexity increases
Solution Approach 1:
The channel layer is segmented into multiple oxide semiconductor layers with different conductivities (n-type and p-type) stacked vertically. This segmentation allows each layer to contribute differently to the electrical characteristics, improving overall device performance while managing complexity through functional division
Solution Approach 2:
The patent employs composite material structures by combining different oxide semiconductor materials with distinct conductivity types in a stacked configuration. This composite approach enables tailored electrical properties and enhanced data storage capacity while maintaining controlled device complexity
2Quantity of substance
If high-capacity memory cells are integrated, then data storage capacity increases, but manufacturing difficulty increases
Solution Approach 1:
The patent transitions from two-dimensional planar memory cell arrangement to three-dimensional vertical channel structures. This dimensional change enables higher data storage capacity within the same footprint while using sequential deposition processes that are compatible with existing manufacturing capabilities
Solution Approach 2:
The invention utilizes parameter changes in material conductivity by employing oxide semiconductors with different conductivity types (n-type and p-type) in stacked layers. This approach increases storage capacity through material property variation rather than increasing device count, simplifying the manufacturing process
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The device achieves improved data storage capacity, low leakage current, and high mobility, along with reduced grain boundary effects, enabling efficient and reliable operation at low temperatures.
Implementation Method 1
a channel layer having a stacked structure of a first oxide semiconductor channel layer of an n-type conductivity and a second oxide semiconductor channel layer of a p-type conductivity on the gate insulating layer, wherein a band gap of the first oxide semiconductor channel layer has a greater value than that of a band gap of the second oxide semiconductor channel layer
Data Source
AI summary
A semiconductor device includes a plurality of gate electrodes spaced apart from each other in a vertical direction on a substrate, a plurality of channel structures respectively penetrating a plurality of gate electrodes and extending in the vertical direction, each comprising a channel layer having a stacked structure of a first oxide semiconductor channel layer and a second oxide semiconductor channel layer which have different conductivities, and a gate insulating layer disposed between the channel layer and each of the plurality of gate electrodes, and a plurality of bit lines disposed on the plurality of channel structures and respectively connected to the plurality of channel structures, and the gate insulating layer, the first oxide semiconductor channel layer, and the second oxide semiconductor channel layer are sequentially disposed.