Vertical Semiconductor Package Leads for Heat and Isolation

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Solution Overview

Problem

Existing semiconductor packages face challenges in maintaining reliability while minimizing horizontal space on redistribution boards, with current vertical mounting solutions not adequately addressing heat dissipation and electrical isolation issues.

Innovation Solution

The semiconductor package design features leads with recessed distal ends and protruding side faces that are perpendicular to the die surfaces, increasing heat dissipation and electrical isolation, and are embedded in mold compound to enhance reliability and reduce board space usage.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Device complexity

If the semiconductor die is mounted with major surfaces parallel to the redistribution board surface, then the electrical connections are simplified, but the horizontal space occupied by the package is large

Engineering Contradiction:
Improveelectrical connection arrangementVSAvoidhorizontal space on redistribution board
Core Design Contradiction:
Device complexityVSArea of stationary object

Solution Approach 1:

The patent transitions from a planar mounting arrangement (die surfaces parallel to board) to a vertical mounting arrangement (die surfaces perpendicular to board). This dimensional change allows the package to utilize the vertical space above the board rather than occupying excessive horizontal area, thereby resolving the contradiction between connection simplicity and space occupation.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Area of stationary object

If the semiconductor die is mounted vertically with major surfaces perpendicular to the redistribution board surface, then the horizontal space is reduced, but the heat dissipation and electrical isolation are insufficient

Engineering Contradiction:
Improvehorizontal space on redistribution boardVSAvoidheat dissipation and electrical isolation
Core Design Contradiction:
Area of stationary objectVSReliability

Solution Approach 1:

The patent segments the package structure into distinct functional zones: the vertically mounted die, the mold compound encapsulation, and the protruding contact pads extending toward the board. This segmentation allows each component to be optimized independently - the vertical mounting saves space while the protruding contact pads provide dedicated pathways for heat dissipation and electrical isolation, resolving the reliability concerns.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The mold compound acts as an intermediary material between the vertically mounted die and the redistribution board. It provides thermal management by conducting heat away from the die while simultaneously providing electrical isolation between adjacent contacts, thereby resolving the heat dissipation and electrical isolation issues that arise from vertical mounting.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Strength

If the lead thickness at the distal end is increased to improve mechanical strength, then the heat dissipation is improved, but the electrical isolation between adjacent contacts is reduced

Engineering Contradiction:
Improvemechanical strength of leadVSAvoidelectrical isolation between contacts
Core Design Contradiction:
StrengthVSReliability

Solution Approach 1:

The patent applies local quality by varying the lead cross-sectional dimensions along its length. The lead has a thicker section at the die attachment point for mechanical strength and heat conduction, and a thinner protruding distal end for electrical isolation. This localized dimensional variation allows the lead to simultaneously satisfy mechanical strength requirements and electrical isolation requirements.

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS11978692B2Semiconductor package, semiconductor module and methods for manufacturing a semiconductor package and a semiconductor module
Publication Date: 2024.05.07 INFINEON TECH AUSTRIA AG
  • US11978692B2 patent drawing
  • US11978692B2 patent drawing
  • US11978692B2 patent drawing

AI summary

A semiconductor package includes a semiconductor die having opposing first and second main surfaces, a first power electrode on the first main surface and a second power electrode on the second main surface, a first lead having an inner surface attached to the first power electrode and a distal end having a first protruding side face extending substantially perpendicularly to the first main surface of the die, a second lead having an inner surface attached to the second power electrode and a distal end having a second protruding side face extending substantially perpendicularly to the second main surface of the die, and a mold compound enclosing at least part of the die and at least part of the first and second leads. The first lead includes a recess positioned in an edge of the inner surface. The second lead includes a recess positioned in an edge of the inner surface.