Vertical Pillar Device Replacement Technique for CMOS Scaling
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Solution Overview
Problem
CMOS devices with vertical transistors face challenges in scaling due to defective epitaxy caused by lattice mismatch between fin materials and substrates, leading to issues like excessive leakage currents and yield problems.
Innovation Solution
A replacement technique is used to form vertical pillar structures with non-100% silicon materials like III-V or SiGe, which involves forming silicon fins, removing them, and regrowing them with different materials, along with aspect ratio trapping to manage epitaxial defects, allowing for diverse device fabrication on standard substrates without the need for special substrates.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If silicon fins are formed directly on substrate using conventional epitaxy, then fabrication process is simple, but lattice mismatch causes defective epitaxy and excessive leakage currents
Solution Approach 1:
The fabrication process is segmented into distinct phases: forming sacrificial silicon fins, removing them to create recesses, and separately growing replacement pillars with non-100% silicon materials. This segmentation allows each material to be optimized independently, resolving the lattice mismatch problem while maintaining fabrication feasibility through standardized CMOS-compatible processes
Solution Approach 2:
Silicon fins are formed preliminarily as sacrificial structures before the actual device materials are grown. These preliminary silicon fins enable subsequent selective removal and replacement with defect-free non-100% silicon materials, preventing epitaxial defects from propagating to the final device structure
2Reliability
If non-100% silicon materials are grown directly on substrate, then lattice mismatch defects are reduced, but special substrates are required
Solution Approach 1:
Silicon fins serve as intermediary sacrificial structures that enable the growth of non-100% silicon materials on standard silicon substrates. The silicon fins are temporarily present during fabrication to facilitate material growth, then removed to allow direct contact between the replacement pillars and substrate, achieving both defect reduction and substrate compatibility
Solution Approach 2:
The material composition parameter is changed from 100% silicon to non-100% silicon (III-V or SiGe) in the replacement pillars, improving electrostatic characteristics. This parameter change is achieved through controlled epitaxial growth processes that are compatible with standard silicon substrates, maintaining versatility while enhancing device performance
3Productivity
If vertical transistors are scaled to smaller dimensions, then device density is improved, but leakage currents increase due to epitaxial defects
Solution Approach 1:
The potential harm of lattice mismatch and epitaxial defects is converted into a benefit by using sacrificial silicon fins as placeholders. The silicon fins are intentionally removed to create recesses that are then filled with defect-free replacement materials, transforming the potential defect source into a method for achieving superior device density and reduced leakage currents
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances electrostatic characteristics, reduces leakage currents, and improves device yield by trapping defects at the substrate interface, enabling the fabrication of high-density vertical transistors compatible with CMOS processing.
Implementation Method 1
A replacement technique is used to form vertical pillar structures with non-100% silicon materials like III-V or SiGe, which involves forming silicon fins, removing them, and regrowing them with different materials
Implementation Method 2
along with aspect ratio trapping to manage epitaxial defects, allowing for diverse device fabrication on standard substrates without the need for special substrates
Data Source
AI summary
A vertical pillar device includes a substrate, one or more pillars, a drain section, and a source section. The one or more pillars include a first end and a second end. The first end is connected to the substrate at a first interface. The substrate and the one or more pillars are made of different materials. The drain section surrounds the one or more pillars near the first end and away from the first interface. The source section connects to the one or more pillars at the second end.