Vertical Pillar Semiconductor Device for High Integration Density
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Solution Overview
Problem
As semiconductor devices become highly integrated, the reduced distance between charge storage elements leads to a decrease in the effective area of the lower electrode, resulting in decreased capacitance, which degrades the electrical characteristics and reliability of DRAM devices.
Innovation Solution
A semiconductor device is designed without a gate or capacitor, featuring a vertical structure with a body region that stores charges, using a stack structure of materials like silicon and germanium to increase integration density and reduce manufacturing processes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the distance between adjacent charge storage elements is decreased to achieve high integration, then the integration density is improved, but the effective area of the lower electrode is reduced, resulting in decreased capacitance
Solution Approach 1:
The patent transitions from a planar charge storage element configuration to a three-dimensional structure by forming a pillar extending in the vertical direction through stacked drain, body, and source regions. This vertical stacking allows the charge storage function to be achieved in the third dimension, thereby maintaining sufficient effective area for capacitance while reducing the horizontal footprint to achieve high integration density.
2Ease of operation
If a conventional gate and capacitor structure is used, then the transistor switching function is achieved, but the device complexity and number of manufacturing processes increase
Solution Approach 1:
The patent extracts and eliminates the gate insulating film and separate capacitor structure from the conventional transistor configuration. The switching function is achieved through the vertical pillar structure with stacked drain, body, and source regions, where the body region serves as the charge storage element, thereby simplifying the device structure and reducing manufacturing complexity.
Solution Approach 2:
The patent merges the transistor and capacitor functions into a single integrated pillar structure. The drain, body, and source regions are stacked vertically to form a unified structure that simultaneously provides transistor switching capability and charge storage function, eliminating the need for separate gate and capacitor components.
3Productivity
If the effective area of the lower electrode is reduced due to high integration, then the integration density is improved, but the electrical characteristics and reliability are degraded
Solution Approach 1:
The patent resolves this contradiction by moving the charge storage function to the vertical dimension through the pillar structure. The stacked drain, body, and source regions extend in the third direction, providing sufficient volume for charge storage and maintaining electrical characteristics while minimizing the horizontal area occupied by each device, thereby achieving both high integration density and reliable electrical performance.
Data Source
AI summary
A semiconductor device and a method for manufacturing the semiconductor device are provided. The semiconductor device includes: a substrate: a drain region vertically disposed on the substrate; a body region vertically disposed on the drain region; a source region vertically disposed on the body region; a bit-line connected to the drain region and extending in a first direction; and a word-line connected to the source region and extending in a second direction that is different from the first direction. The drain region, the body region, and the source region together define a pillar extending in a third direction that is perpendicular to the first and second direction.