Vertical Semiconductor Pillar Device Trench Definition

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Solution Overview

Problem

Forming vertical devices such as thyristors or MOSFETs with vertical gates presents challenges, including poorly defined features due to simultaneous etching of multiple materials, which can lead to inaccuracies in trench formation and semiconductor structure creation.

Innovation Solution

Etching different materials at different times and forming a semiconductor structure partially between the etched materials, using silicon nitride and silicon dioxide as dielectrics, with epitaxial silicon growth self-aligned to the etched pillars, allowing for precise control and definition of features.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If multiple materials are etched simultaneously to form trenches, then the manufacturing process is simplified and productivity is improved, but the trench definition and feature precision deteriorate

Engineering Contradiction:
Improvemanufacturing process efficiencyVSAvoidtrench definition accuracy
Core Design Contradiction:
ProductivityVSManufacturing precision

Solution Approach 1:

The patent divides the etching process into separate sequential steps for different materials (silicon nitride etched first, then silicon dioxide etched afterward). This segmentation allows each material to be etched with optimized parameters and selective etchants, achieving well-defined trenches and features without the precision loss that would occur in simultaneous multi-material etching.

Inventive Principle:
Principle #1Segmentation

2Reliability

If epitaxial silicon is grown to form vertical pillars, then the device structure is improved, but the process complexity increases

Engineering Contradiction:
Improvedevice structure qualityVSAvoidprocess steps
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent performs preliminary actions by first forming the complete dielectric structure (silicon nitride pillars and silicon dioxide trenches) before growing the epitaxial silicon. This preliminary structuring provides a well-defined template that guides the subsequent epitaxial growth, ensuring that silicon forms precisely where needed while maintaining process control and reducing overall complexity.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The epitaxial silicon growth is self-aligned to the existing silicon nitride pillars and silicon dioxide trenches. The pre-formed dielectric structures automatically serve as alignment references and physical constraints during epitaxial growth, eliminating the need for additional masking or alignment steps and reducing process complexity while ensuring high structural quality.

Inventive Principle:
Principle #25Self-service

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach improves the precision and performance of vertical devices by enabling better-defined trench structures and epitaxial silicon growth, enhancing the formation of vertical thyristors or MOSFETs with improved performance compared to conventional methods.

Implementation Method 1

Etching different materials at different times and forming a semiconductor structure partially between the etched materials

Methodology Applied
Scientific EffectEtching:

Implementation Method 2

epitaxial silicon growth self-aligned to the etched pillars

Methodology Applied
Scientific EffectEpitaxial growth: Epitaxy

Data Source

PatentUS9728634B2Vertical semiconductor pillar device
Publication Date: 2017.08.08 MICRON TECHNOLOGY INC
  • US9728634B2 patent drawing
  • US9728634B2 patent drawing
  • US9728634B2 patent drawing

AI summary

Methods of fabricating vertical devices are described, along with apparatuses and systems that include them. In one such method, a vertical device is formed at least partially in a void in a first dielectric material and a second dielectric material. Additional embodiments are also described.