Vertical Power Device Anti-Parallel Diode Without Back-Side Masking
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Solution Overview
Problem
Existing methods for forming an anti-parallel diode in vertical power switches require complex back-side masking and doping processes, making them difficult to integrate into the fabrication of vertical power devices like IGTOs and IGBTs.
Innovation Solution
A method involving blanket phosphorus and boron implants, followed by laser annealing and intentional damage to the crystalline structure for uneven etching, allowing for the formation of an anti-parallel diode without the need for back-side masking, using energetic particles to enhance etching rates and create a damaged crystal structure that etches faster than undamaged silicon.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If back-side masking and doping processes are used to form an anti-parallel diode, then the anti-parallel diode can be formed in vertical power switches, but the fabrication process becomes complex and difficult to integrate
Solution Approach 1:
The patent removes the masking step from the back-side processing sequence. By using a blanket doping approach without masks, the complex masking and alignment processes are extracted and eliminated, significantly simplifying the fabrication workflow while still achieving the desired anti-parallel diode structure in the termination regions
Solution Approach 2:
The blanket phosphorus and boron implants serve multiple functions simultaneously: they form the anti-parallel diode in termination regions, provide electrical contact to the drift region, and create the necessary doped structures without requiring separate processing steps for each function, thereby reducing overall process complexity
2Ease of manufacture
If intentional damage to crystalline structure is performed to enable uneven etching, then the anti-parallel diode cathode can be formed without back-side masking, but additional processing steps are required
Solution Approach 1:
The crystalline damage is intentionally created in advance through ion implantation or laser processing before the final etching step. This preliminary action modifies the etch selectivity of different regions, allowing the etch to automatically follow the damaged crystal boundaries and form the anti-parallel diode cathode without requiring masking during the etch process itself
Solution Approach 2:
The damaged crystalline structure acts as an intermediary that translates the blanket doping profile into a selectively etched pattern. The damage creates regions with different etch rates that correspond to where the anti-parallel diode should be formed, serving as a self-aligned mask that eliminates the need for external masking layers
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Enables the integration of an anti-parallel diode within vertical power devices, reducing fabrication complexity and improving the device's ability to handle reverse voltage spikes without increasing forward voltage drop.
Implementation Method 1
blanket phosphorus and boron implants
Implementation Method 2
laser annealing
Implementation Method 3
intentional damage to the crystalline structure for uneven etching, allowing for the formation of an anti-parallel diode without the need for back-side masking, using energetic particles to enhance etching rates
Implementation Method 4
create a damaged crystal structure that etches faster than undamaged silicon
Data Source
AI summary
After the various regions of a vertical power device are formed in or on the top surface of an n-type wafer, the wafer is thinned, such as by grinding. A drift layer may be n-type, and various n-type regions and p-type regions in the top surface contact a top metal electrode. A blanket dopant implant through the bottom surface of the thinned wafer is performed to form an n− buffer layer and a bottom p+ emitter layer. Energetic particles are injected through the bottom surface to intentionally damage the crystalline structure. A wet etch is performed, which etches the damaged crystal at a much greater rate, so some areas of the n− buffer layer are exposed. The bottom surface is metallized. The areas where the metal contacts the n− buffer layer form cathodes of an anti-parallel diode for conducting reverse voltages, such as voltage spikes from inductive loads.