Vertical Power Supply Configuration Reducing Current Path Losses

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

High current power supply applications face significant losses due to the distance between the power supply apparatus and the processor chip in horizontal power supply systems, leading to reduced power supply efficiency.

Innovation Solution

A vertically powered electronic device configuration is proposed, where the power supply apparatus and the processor chip are placed on opposite sides of the system board, reducing the current path length and minimizing losses. Additionally, output capacitors are integrated into the power supply apparatus, and the pins of the power supply apparatus are connected to the system board vias in close proximity to avoid each other.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Loss of energy

If horizontal power supply mode is used with power supply apparatus and processor chip on the same side of system board, then ease of manufacture and standard PCB layout are maintained, but power supply losses increase significantly to 5%-10% at high currents

Engineering Contradiction:
Improvepower supply lossVSAvoidpower supply configuration complexity
Core Design Contradiction:
Loss of energyVSEase of operation

Solution Approach 1:

The patent transitions from horizontal power supply layout to vertical power supply layout, changing the spatial dimension of current flow. The power supply apparatus is positioned vertically above the processor chip through system board vias, creating a vertical current path that significantly reduces the current path length and associated power losses compared to horizontal routing.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Productivity

If vertical power supply configuration is adopted to reduce current path length, then power supply efficiency improves with losses reduced to less than 1%, but device complexity increases due to via interconnections

Engineering Contradiction:
Improvepower supply efficiencyVSAvoidvia interconnection structure
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent merges the power supply apparatus, output capacitors, and processor chip into a vertically integrated configuration. The output capacitors are positioned vertically adjacent to the processor chip and electrically connected through the same via structure, combining multiple power supply components into a unified vertical assembly that reduces overall complexity despite the vertical architecture.

Inventive Principle:
Principle #5Merging (Combining)

3Reliability

If output capacitors are placed on the back side of system board facing the processor, then decoupling effect is improved, but additional via interconnections are required increasing manufacturing complexity

Engineering Contradiction:
Improvedecoupling effectVSAvoidcapacitor mounting complexity
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

The patent implements a nested vertical arrangement where output capacitors are positioned vertically adjacent to the processor chip, with the capacitors, vias, and chip forming a compact vertical stack. This nested configuration allows the capacitors to be electrically connected to the processor through the same via structure, integrating multiple functions into a single vertical space rather than requiring separate horizontal mounting areas.

Inventive Principle:
Principle #7Nested doll (Nesting)

Data Source

PatentUS12342450B2Power supply apparatus, load and electronic device
Publication Date: 2025.06.24 DELTA ELECTRONICS (SHANGHAI) CO LTD
  • US12342450B2 patent drawing
  • US12342450B2 patent drawing
  • US12342450B2 patent drawing

AI summary

An electronic device includes: a system board; a load, located on the first side of the system board and including a power supply region, the power supply region includes load pins arranged in a plurality of rows and in a plurality of columns; and at least one column of output capacitors, located on the second side of the system board along a third direction; at least one row of the load pins is a first arrangement row, the first arrangement row includes a plurality of load pin groups arranged sequentially along the second direction, each of the load pin groups includes at least two load pins of a same polarity; and two ends of a vertical projection of each column of the output capacitors on the power supply region are located at two sides of a centerline, in the third direction, of at least one first position pin.