Vertical Power Supply Module for IC Chip Assembly
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Solution Overview
Problem
Traditional power supply modules for smart ICs in data centers and intelligent terminals face challenges in minimizing mainboard resource occupation, reducing signal interference, and improving efficiency, especially with the vertical supply scheme, which still experiences issues with power transmission efficiency and interference with signal traces.
Innovation Solution
A power supply module is designed with a two-stage power supply unit configuration, where the second-stage power supply unit is located under the integrated circuit chip, reducing mainboard space occupation and signal interference by vertically supplying power directly to the IC, utilizing a second carrier board to transmit power between the stages and incorporating capacitors and inductors for improved efficiency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If a traditional horizontal supply power scheme is used, then the power supply module can be easily implemented, but the current transmission path is long, occupying more mainboard resource and causing greater interference to signal traces
Solution Approach 1:
The patent transitions from a traditional horizontal power supply scheme to a vertical power supply scheme. The power supply module is positioned below the integrated circuit chip, and power is transmitted vertically through the carrier board to the chip, changing the spatial dimension of power transmission from horizontal to vertical. This resolves the contradiction by shortening the current transmission path and reducing interference to signal traces on the mainboard while maintaining ease of implementation through standardized vertical connection interfaces.
2Productivity
If a vertical supply power scheme is used, then the current transmission path is shortened, but the power supply module height increases, making it difficult to match space constraints near the system board
Solution Approach 1:
The patent embeds the power supply module within the carrier board structure, positioning it in the space below the integrated circuit chip. The module utilizes the vertical space between the chip and the mainboard, effectively nesting the power supply function into the existing assembly footprint. This resolves the contradiction by achieving short vertical transmission paths while containing the module height within the available space constraints of the system board assembly.
3Area of stationary object
If a vertical supply power scheme is used, then mainboard space occupation is reduced, but the complexity of power transmission through the carrier board increases
Solution Approach 1:
The carrier board is designed to serve multiple functions: it provides mechanical support for the integrated circuit chip, transmits power vertically to the chip, and facilitates signal transmission. The power supply module integrates power transmission capabilities directly into the carrier board structure, eliminating the need for separate horizontal power transmission paths. This resolves the contradiction by reducing mainboard space occupation while managing transmission complexity through multi-functional integration.
Data Source
AI summary
The present disclosure provides a power supply module. The power supply module is applied to an integrated circuit chip assembly which includes a first carrier board and an integrated circuit chip located at a first side of the first carrier board; the power supply module includes: a second carrier board; a first-stage power supply unit; and a second-stage power supply unit, power input terminals of the second-stage power supply unit are electrically connected with corresponding power output terminals of the first-stage power supply unit through the second carrier board; power output terminals of the second-stage power supply unit are electrically connected with corresponding power terminals of the integrated circuit chip, a projection of the second-stage power supply unit on a first plane is at least partially located within a projection range of the integrated circuit chip on the first plane, the first plane is parallel to the first carrier board.