Vertical Resistive Memory Array Mitigating Filament Inconsistency

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Solution Overview

Problem

The stochastic nature of oxygen vacancy migration in OxRRAM leads to inconsistent conductive filament formation, resulting in variable resistance states across ReRAM cells, causing issues with achieving reliable low and high resistance states.

Innovation Solution

A vertical resistive memory array is designed with a pillar electrode and switching liner, where multiple single cell electrodes are vertically stacked and connected in parallel, allowing for simultaneous write, read, or reset operations to mitigate the effects of inconsistent CF formation by determining the combined resistance state of the cells.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If oxygen vacancy migration is used to form conductive filaments in OxRRAM, then resistance switching can be achieved, but the stochastic nature of oxygen vacancy migration leads to inconsistent CF formation and variable resistance states

Engineering Contradiction:
Improveresistance state consistencyVSAvoidconductive filament formation consistency
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

The patent combines multiple ReRAM cells (e.g., 2x2 array of 4 cells) into a single memory unit that shares common word line and bit line connections. By merging the resistance states of multiple cells through parallel electrical connections, the system achieves more consistent and reliable resistance switching behavior, as the stochastic variations in individual cells average out across the combined unit.

Inventive Principle:
Principle #5Merging (Combining)

2Reliability

If multiple ReRAM cells are connected in parallel within a memory unit, then the impact of individual cell inconsistencies is reduced, but the device complexity increases

Engineering Contradiction:
Improveresistance state determination accuracyVSAvoidmemory array structure
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent implements a universal memory unit structure where multiple ReRAM cells share common word line and bit line connections. This multi-functional design allows the same structural pattern to be replicated across the entire memory array, simplifying the overall system architecture despite the increased number of cells. The shared connections enable simultaneous access and operation of multiple cells through a standardized interface.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach ensures more accurate and consistent resistance state determination across the ReRAM cells, reducing the impact of individual cell inconsistencies and improving the reliability of resistance switching.

Implementation Method 1

reversible and repeatable resistance change is achieved by controlling the connection and rupture of a conductive filament (CF) in the switching layer

Methodology Applied
Scientific EffectConductive filament formation and rupture:

Implementation Method 2

the migration of oxygen vacancies, which are activated by a combined effect of electric field and thermal effect

Methodology Applied
Scientific EffectOxygen vacancy migration:

Implementation Method 3

activated by a combined effect of electric field and thermal effect

Methodology Applied
Scientific EffectElectric field: Electric Field

Implementation Method 4

activated by a combined effect of electric field and thermal effect

Methodology Applied
Scientific EffectThermal effect: Heating

Data Source

PatentUS11588103B2Resistive memory array
Publication Date: 2023.02.21 INTERNATIONAL BUSINESS MACHINE CORPORATION
  • US11588103B2 patent drawing
  • US11588103B2 patent drawing
  • US11588103B2 patent drawing

AI summary

A vertical resistive memory array is presented. The array includes a pillar electrode and a switching liner around the side perimeter of the pillar electrode. The array includes two or more vertically stacked single cell (SC) electrodes connected to a first side of the switching liner. The juxtaposition of the switching liner, the pillar electrode, and each SC electrode forms respective resistance switching cells (e.g., OxRRAM cell). A vertical group or bank of these cells may be connected in parallel and each share the same pillar electrode. The cells in the vertical cell bank may written to or read from as a group to limit the effects of inconsistent CF formation of any one or more individual cells within the group.