Vertical Scanning Circuit for Partial Display Power Reduction

Solution Overview

Problem

Existing image display apparatuses face challenges in reducing power consumption during partial display functions and self-refresh operations due to the need for simultaneous control of multiple pixel control lines, which increases circuit complexity and size.

Innovation Solution

An image display apparatus with a vertical scanning circuit that generates a scanning start signal and an enabling signal to simultaneously activate multiple pixel control lines, allowing for partial display mode and partial self-refresh operations without adding new circuits, thereby simplifying the structure and reducing power consumption.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Use of energy by moving object

If multiple pixel control lines are simultaneously controlled to enable partial display and self-refresh functions, then power consumption is reduced and display flexibility is improved, but circuit complexity increases

Engineering Contradiction:

Improvepower consumptionVSAvoidcircuit complexity

Core Design Contradiction:

Use of energy by moving objectVSDevice complexity

Solution Approach 1:

The vertical scanning circuit is designed to perform multiple functions: it can sequentially scan pixel control lines for normal display operation, and simultaneously activate multiple pixel control lines for partial display and self-refresh operations. This multi-functionality eliminates the need for separate control circuits, reducing overall circuit complexity while enabling power-saving features

Inventive Principle:

Principle #6Universality (Multi-functionality)

Solution Approach 2:

The patent combines the sequential scanning function and simultaneous activation function into a single vertical scanning circuit. By merging these operations into one circuit, the patent avoids increasing circuit complexity despite adding new functionality for partial display and self-refresh modes

Inventive Principle:

Principle #5Merging (Combining)

2Adaptability or versatility

If simultaneous control of multiple pixel control lines is implemented using conventional methods, then partial display function is achieved, but additional circuits are required increasing device size

Engineering Contradiction:

Improvepartial display capabilityVSAvoidcircuit area

Core Design Contradiction:

Adaptability or versatilityVSArea of stationary object

Solution Approach 1:

The vertical scanning circuit is designed to perform multiple functions: it can sequentially scan pixel control lines for normal display operation, and simultaneously activate multiple pixel control lines for partial display and self-refresh operations. This multi-functionality eliminates the need for separate control circuits, reducing overall circuit complexity while enabling power-saving features

Inventive Principle:

Principle #6Universality (Multi-functionality)

Solution Approach 2:

The patent combines the sequential scanning function and simultaneous activation function into a single vertical scanning circuit. By merging these operations into one circuit, the patent avoids increasing circuit complexity despite adding new functionality for partial display and self-refresh modes

Inventive Principle:

Principle #5Merging (Combining)

Data Source

PatentUS7319453B2Image display apparatus having plurality of pixels arranged in rows and columns

Publication Date: 2008.01.15 RAKUTEN GROUP INC

AI summary

In a partial display mode, a source IC outputs a start signal at an “H” level designating the start of vertical scanning by a vertical scanning circuit, over a plurality of cycles from before a time T1 to after a time T8. A plurality of shift registers sequentially shift the start signal in synchronization with a clock signal to sequentially drive a plurality of activation enable signals, respectively, to an “H” level. Then, after time T8 when first to fourth activation enable signals simultaneously attain an “H” level, the source IC outputs an enabling signal at an “H” level to the vertical scanning circuit. In response, the vertical scanning circuit simultaneously activates first to fourth gate lines corresponding to the first to the fourth activation enable signals, respectively.