Vertical Schottky Diode ESD Protection III-V Transistors
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Solution Overview
Problem
Conventional Schottky diodes in RF ICs provide limited electrostatic discharge (ESD) protection due to saturation of the 2DEG layer at high electrical fields, restricting the maximum current that can be protected.
Innovation Solution
A Schottky diode with a current flowing in a vertical direction through a Schottky barrier, integrated with III-V transistors, utilizing a Schottky stack with an III-V material and a polarization layer, allowing for higher ESD diode current and reduced parasitic capacitance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional Schottky diodes with lateral current flow through 2DEG layer are used, then the device can be integrated with III-V transistors, but the ESD protection capability is limited due to saturation of the 2DEG layer at high electrical fields
Solution Approach 1:
The patent inverts the conventional lateral current flow direction to a vertical current flow direction through the Schottky barrier. Instead of current flowing laterally through the 2DEG layer, current now flows vertically from the Schottky anode through the Schottky barrier into the III-V material layer, fundamentally changing the conduction path to avoid 2DEG saturation limitations.
Solution Approach 2:
The patent transitions from a two-dimensional lateral current flow in the 2DEG layer to a three-dimensional vertical current flow through the Schottky barrier and III-V material layer. This dimensional change enables higher current handling capacity by utilizing the vertical dimension for current transport, bypassing the saturation limits of the lateral 2DEG conduction path.
2Reliability
If vertical Schottky diode configuration is implemented, then higher current handling capacity and ESD protection are achieved, but the device structure becomes more complex
Solution Approach 1:
The patent merges the Schottky diode structure with the III-V transistor fabrication process by integrating the Schottky stack formation into the existing semiconductor manufacturing flow. The Schottky anode, barrier layer, and III-V material layer are formed using combined deposition and epitaxial growth techniques, reducing overall process complexity despite the vertical structure.
Solution Approach 2:
The Schottky barrier layer and III-V material layer serve multiple functions: they form the Schottky junction for ESD protection while also providing the active channel region for the III-V transistor. This multi-functionality reduces the need for separate structural elements, simplifying the overall device architecture despite the vertical configuration.
3Area of stationary object
If Schottky diode is monolithically integrated with III-V transistors, then area and cost are reduced, but the ESD protection performance may be compromised
Solution Approach 1:
The patent employs dynamic material composition in the Schottky stack, where the barrier layer thickness and III-V material composition are optimized to provide both high ESD protection capability and compatibility with transistor operation. The vertical structure allows independent optimization of ESD and transistor performance parameters without area constraints.
Solution Approach 2:
The patent changes key parameters including the vertical orientation of current flow, Schottky barrier thickness, and III-V material layer composition to simultaneously achieve high ESD protection performance and compact integration. These parameter changes enable the diode to provide superior ESD protection while occupying minimal chip area through the vertical architecture.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The vertical Schottky diode configuration enhances ESD protection with higher current handling capacity and improved circuit performance, while being monolithically integrated with III-V transistors on the same chip, reducing area and cost.
Implementation Method 1
A Schottky anode is in contact with the second layer to form a Schottky barrier at an interface between the Schottky anode and the second layer of the Schottky stack
Data Source
AI summary
Embodiments herein describe techniques, systems, and method for a semiconductor device. Embodiments herein may present a semiconductor device having a channel area including a channel III-V material, and a source area including a first portion and a second portion of the source area. The first portion of the source area includes a first III-V material, and the second portion of the source area includes a second III-V material. The channel III-V material, the first III-V material and the second III-V material may have a same lattice constant. Moreover, the first III-V material has a first bandgap, and the second III-V material has a second bandgap, the channel III-V material has a channel III-V material bandgap, where the channel material bandgap, the second bandgap, and the first bandgap form a monotonic sequence of bandgaps. Other embodiments may be described and/or claimed.