Vertical Oxide Channel Selector Transistor for Low-Leakage Memory Arrays
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Solution Overview
Problem
Traditional selector devices, such as diodes or ovonic threshold switches, face limitations in device density, leakage current, high threshold voltages, and manufacturing cost, making them unsuitable for compact, low-cost array applications.
Innovation Solution
The integration of a vertical channel field effect transistor as a selector element in a cross-point memory array, connected in series with memory elements, which allows electrical conduction only when turned on by a gate bias voltage, enhancing signal-to-noise ratio and operational window.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If traditional selector devices (diodes or ovonic threshold switches) are used, then device structure is simple, but device density is low and leakage current is high
Solution Approach 1:
The patent transitions from planar (2D) selector devices to vertical (3D) channel field effect transistors. The vertical channel structure extends the conduction path in the third dimension, enabling higher device density while maintaining structural simplicity through the vertical stacking of source, channel, and drain regions.
Solution Approach 2:
The gate electrode is positioned within the vertical channel structure, with the gate dielectric layer surrounding the channel material. This nested configuration allows the gate to control the vertical channel from multiple directions, achieving effective channel control while maximizing space utilization for higher density.
2Reliability
If traditional selector devices are used, then manufacturing process is simple, but on-off ratio is low and operational window is limited
Solution Approach 1:
The patent employs metal oxide semiconductor channel materials with specific physical and electrical parameters that enable high on-off ratios. By selecting materials with appropriate bandgap, mobility, and threshold voltage characteristics, the device achieves superior switching performance while using established semiconductor manufacturing techniques.
Solution Approach 2:
The vertical channel structure comprises multiple material layers including metal oxide semiconductor channel material, gate dielectric material, and electrode materials. This composite structure combines the advantages of different materials to achieve high on-off ratio, appropriate threshold voltage, and compatibility with standard fabrication processes.
3Object-generated harmful factors
If traditional selector devices are used, then threshold voltage is low, but leakage current is high and signal-to-noise ratio is poor
Solution Approach 1:
The gate electrode is positioned to provide localized control over the vertical channel, creating an electric field that modulates carrier concentration specifically in the channel region. This localized control enables effective suppression of leakage current while maintaining appropriate threshold voltage for device operation, improving signal-to-noise ratio.
Solution Approach 2:
The patent replaces traditional junction-based selection mechanisms with field-effect control. The gate electric field substitutes for physical junction structures, providing superior control over channel conduction and enabling low leakage current through electrical field modulation rather than relying on junction properties.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution effectively reduces leakage current, increases the size and density of cross-point memory arrays, and provides a more efficient operational window by using metal oxide semiconductor channel materials with high on-off ratios.
Implementation Method 1
a vertical channel field effect transistor as a selector element... which allows electrical conduction only when turned on by a gate bias voltage
Implementation Method 2
metal oxide semiconductor channel materials with high on-off ratios
Data Source
AI summary
A device structure includes at least one selector device. Each selector device includes a vertical stack including, from bottom to top, a bottom electrode, a metal oxide semiconductor channel layer, and a top electrode and located over a substrate, a gate dielectric layer contacting sidewalls of the bottom electrode, the metal oxide semiconductor channel layer, and the top electrode, and a gate electrode formed within the gate dielectric layer and having a top surface that is coplanar with a top surface of the top electrode. Each top electrode or each bottom electrode of the at least one selector device may be contacted by a respective nonvolatile memory element to provide a one-selector one-resistor memory cell.