Vertical Selector Pillars for 3D Memory Sneak Current
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Solution Overview
Problem
In three-dimensional non-volatile memory arrays, sneak current through unselected cells during write operations reduces reliability and increases power consumption, and providing selection components across multiple layers is costly and time-consuming.
Innovation Solution
The use of selector columns or pillars with concentric selective layers that permit electrical current only when a voltage threshold is satisfied, limiting sneak current and facilitating independent selection of memory cells across multiple layers.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If selection components (transistors, Zener diodes) are provided for multiple layers of memory cells, then sneak current is limited and reliability is improved, but fabrication time and cost significantly increase
Solution Approach 1:
The patent transitions from two-dimensional planar selection components to three-dimensional vertical selector pillars that extend through multiple memory cell layers. This vertical dimension allows a single selector component to control current flow across multiple layers simultaneously, reducing the total number of selection components needed while maintaining reliability and preventing sneak current in unselected cells.
Solution Approach 2:
The vertical selector pillars serve multiple functions: they act as selection components for multiple memory cell layers simultaneously, provide current limiting through their inherent resistive properties, and enable simplified fabrication through a single formation process that replaces what would otherwise require multiple separate selection components across different layers.
2Reliability
If selection components are provided for each layer of memory cells, then current control is improved, but fabrication time increases
Solution Approach 1:
The patent merges the selection functionality for multiple memory cell layers into single vertical selector pillars that extend through all layers. Instead of forming separate selection components for each layer, the selector pillars are formed in a single fabrication step that simultaneously provides current control across multiple layers, significantly reducing fabrication time while maintaining effective current control.
3Object-generated harmful factors
If traditional selection components are used across multiple layers, then current limiting is achieved, but manufacturing cost increases
Solution Approach 1:
The patent changes the geometric parameters of the selection component from planar two-dimensional structures to vertical three-dimensional pillars. This parameter change allows the selector components to extend through multiple memory cell layers, providing effective current limiting and leakage control while reducing the total number of components required, thereby lowering manufacturing cost and simplifying the fabrication process.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution enhances the reliability of read and write operations by minimizing sneak current and simplifies manufacturing by allowing selector components to be formed in a single step across multiple layers, reducing fabrication costs and time.
Implementation Method 1
one or more selective layers may permit an electrical current through a cell, between a word line and a central conductor, in response to a voltage satisfying a threshold
Implementation Method 2
a plurality of layers of planar magnetic tunnel junctions forms a three-dimensional non-volatile memory array
Data Source
AI summary
Apparatuses, systems, and methods are disclosed for non-volatile memory. A plurality of layers of planar non-volatile memory cells forms a three-dimensional memory array. A plurality of word lines are coupled to planar non-volatile memory cells. Word lines may extend horizontally across layers of memory cells. A plurality of selector columns are coupled to planar non-volatile memory cells. Selector columns extend vertically through layers of memory cells, and may include central conductors surrounded by one or more concentric selective layers. One or more selective layers may permit an electrical current through a cell, between a word line and a central conductor, in response to a voltage satisfying a threshold.