Vertical Selector STT-MRAM Architecture Using 2D Source-Plane
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Solution Overview
Problem
Current magnetic random-access memory (MRAM) technologies face limitations in data density due to the need for separate, patterned linear source-lines, which restricts electrical conductivity and manufacturing efficiency.
Innovation Solution
A magnetic memory array architecture incorporating a two-dimensional, planar source-plane that electrically connects vertical semiconductor channel structures, eliminating the need for individual rows of source-lines and enhancing data density by improving current flow and reducing manufacturing constraints.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If separate, patterned linear source-lines are used to connect memory elements, then electrical conductivity and manufacturing precision can be maintained, but data density is limited due to the restrictive linear structure
Solution Approach 1:
The patent transforms the traditional one-dimensional linear source-lines into a two-dimensional planar source-plane structure. This dimensional change allows memory elements to be connected in multiple directions simultaneously, enabling higher data density without compromising electrical conductivity or manufacturing precision. The planar configuration permits vertical semiconductor channel structures to access the source-plane from above, eliminating the need for complex patterned linear routing.
2Productivity
If traditional linear source-lines are used, then manufacturing processes can be standardized, but manufacturing efficiency and electrical conductivity are restricted
Solution Approach 1:
The patent merges multiple separate linear source-lines into a single continuous planar source-plane structure. This consolidation eliminates the need for complex patterning processes required for multiple linear lines, simplifying manufacturing while improving electrical conductivity through the continuous planar geometry. The source-plane serves as a unified foundation for all vertical semiconductor channel structures, enhancing both manufacturing efficiency and electrical performance.
3Reliability
If separate source-lines are patterned for each row, then electrical connection reliability can be ensured, but device complexity and manufacturing constraints increase
Solution Approach 1:
The planar source-plane serves as a universal connection structure for all vertical semiconductor channel structures in the memory array. Instead of requiring separate dedicated source-lines for each row, the single planar structure provides electrical connection reliability for all elements simultaneously. This multi-functional approach maintains reliable electrical connections while dramatically reducing device complexity and eliminating manufacturing constraints associated with multiple patterned lines.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The two-dimensional source-plane design significantly increases data density and reduces manufacturing complexities, enabling more efficient data storage and improved electrical conductivity without the limitations of traditional linear source-line formations.
Implementation Method 1
The magnetic free layer has a magnetization that is free to move so that it can be oriented in either of two directions that are both generally perpendicular to the plane of the magnetic free layer. Therefore, the magnetization of the free layer can be either parallel with the magnetization of the reference layer or anti-parallel with the direction of the reference layer
Implementation Method 2
The switching of the MTJ element between high and low resistance states results from electron spin transfer. When electrons flow through a magnetized layer, the spin orientations of the electrons become aligned so that there is a net aligned orientation of electrons flowing through the magnetic layer
Implementation Method 3
The electrical resistance through the MTJ element in a direction perpendicular to the planes of the layers changes with the relative orientations of the magnetizations of the magnetic reference layer and magnetic free layer
Data Source
AI summary
A magnetic memory array having a source-plane electrically connected with an array of channel selectors in two-dimensions. The array of channel selectors can be arranged in rows and columns with both the rows and columns being electrically connected with a source-plane. A magnetic memory element such as a magnetic tunnel junction element can be electrically connected with each of the channel selectors. The source-plane can include a doped region formed in a surface of a semiconductor substrate and may also include an electrically conductive layer formed on the doped region. The use of such a planar, two-dimensional source-plane allows for greatly increased data density by eliminating the need to form separate source-line source lines for individual rows of channel selectors.