Vertical Semiconductor Devices Buffer Pattern Contact Plug Defects
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Solution Overview
Problem
Vertical semiconductor devices face defects in contact plugs, such as punching and contact not open issues, due to the staircase shape of conductive patterns, which are challenging to address in existing manufacturing processes.
Innovation Solution
Incorporating a buffer pattern with high etch selectivity over the insulating interlayer, which reduces defects by controlling the etching process and ensuring proper contact plug formation, and using multiple contact plugs that pass through the buffer pattern and insulating interlayers to contact pad patterns effectively.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If contact plugs are formed directly on pad patterns with staircase-shaped edges, then manufacturing process is simple, but defects such as punching and contact not open occur frequently
Solution Approach 1:
A buffer pattern is introduced as an intermediary layer between the pad patterns and contact plugs. This buffer pattern has high etch selectivity and serves as a mediator during the etching process, preventing direct contact between the etching tools and the pad patterns with staircase-shaped edges, thereby eliminating punching defects and contact not open issues while maintaining manufacturing simplicity
Solution Approach 2:
The buffer pattern is formed in advance before contact plug formation. This preliminary action prepares a protective layer that will prevent defects during subsequent etching processes, ensuring reliable contact plug formation without requiring complex manufacturing steps
2Manufacturing precision
If etching is performed to expose pad patterns with staircase shape, then contact plugs can be formed, but punching defects and contact not open defects occur
Solution Approach 1:
The buffer pattern acts as a protective intermediary during etching, preventing the etching process from directly affecting the pad patterns. This eliminates punching defects (where etching removes too much material) and contact not open defects (where etching fails to expose the contact area) by providing a controlled etching interface
Solution Approach 2:
The buffer pattern provides beforehand cushioning by being positioned to receive etching attacks first. Its high etch selectivity ensures it can be selectively removed or protected during etching, cushioning the pad patterns from harmful etching effects and ensuring precise contact plug formation
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The buffer pattern effectively reduces defects in contact plugs by controlling etching and ensuring proper contact formation, enhancing the reliability and efficiency of the vertical semiconductor device manufacturing process.
Implementation Method 1
A portion of the buffer pattern and the insulating interlayer may be etched to form a first contact hole exposing one of the pad patterns
Data Source
AI summary
A vertical semiconductor device may include may include a substrate, a stacked structure, an insulating interlayer, a buffer pattern and a first contact plug. The stacked structure may include insulation patterns and conductive patterns stacked on each other on the substrate. The conductive patterns may extend in a first direction parallel to an upper surface of the substrate, and edges of the conductive patterns may have a staircase shape. The conductive patterns may include pad patterns defined by exposed upper surfaces of the conductive patterns. The insulating interlayer may cover the stacked structure. The buffer pattern may be on the insulating interlayer. The first contact plug may pass through the buffer pattern and the insulating interlayer. The first contact plug may contact one of the pad patterns. The buffer pattern may reduce defects from forming the first contact plug.