Vertical Semiconductor Devices with Multiple Threshold Voltages
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Solution Overview
Problem
Advanced semiconductor technology requires integration of multiple functions into a single chip, necessitating a semiconductor device with multiple threshold voltages to enhance performance and reduce chip dimension.
Innovation Solution
A method involving forming and implanting processes to fabricate vertical devices with multiple thresholds, using deposition, photolithography, and etching processes, with conductive layers and dopants implanted at tilted angles to create PMOS and NMOS devices with distinct threshold voltages, and utilizing high-k dielectric layers and salicides to reduce contact resistance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of stationary object
If multiple functions are integrated into a single chip, then chip dimension is reduced and performance is enhanced, but the device requires multiple threshold voltages which increases fabrication complexity
Solution Approach 1:
The patent applies local quality by forming different conductive layers with distinct work functions at different locations within the same semiconductor device. Specifically, a first conductive layer with a first work function is formed in a first region, while a second conductive layer with a second work function is formed in a second region, enabling different threshold voltages in different areas of the device to support multiple functions on a single chip
Solution Approach 2:
The patent segments the gate structure into multiple conductive layers, each with different work functions. The gate electrode is divided into a first conductive layer and a second conductive layer, where each layer can be independently formed and controlled to provide different threshold voltages for different functional regions of the semiconductor device
2Adaptability or versatility
If conductive layers with different work functions are formed, then multiple threshold voltages are achieved, but the fabrication process becomes more complex
Solution Approach 1:
The patent employs preliminary action by forming the first conductive layer with the first work function before forming the second conductive layer with the second work function. This sequential approach allows each layer to be independently optimized and controlled, simplifying the overall fabrication process while still achieving multiple threshold voltages in the final device
Solution Approach 2:
The patent utilizes parameter changes by varying the work function parameter of the conductive layers. By selecting materials with different work functions for the first and second conductive layers, the patent achieves different threshold voltages without fundamentally changing the device structure or fabrication methodology
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Enables the fabrication of semiconductor devices with multiple thresholds, allowing for efficient integration of various functions within a single chip, enhancing performance and reducing chip size effectively.
Implementation Method 1
a method involving forming and implanting processes to fabricate vertical devices with multiple thresholds
Implementation Method 2
using deposition, photolithography, and etching processes
Data Source
AI summary
A semiconductor device includes a first vertical device having a first threshold and second vertical device having a second threshold. The first vertical device includes a first source; a first channel over the first source; a first drain over the first channel; a first conductive layer adjacent to the first channel; and a first gate adjacent to the first conductive layer. The second vertical device includes a second source; a second channel over the second source; a second drain over the second channel; a second conductive layer adjacent to the second channel; and a second gate adjacent to the second conductive layer.