Vertical Semiconductor Device Word Line Wiring
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Solution Overview
Problem
The complexity of wiring design in vertically stacked semiconductor devices due to the vertical arrangement of word lines complicates the application of electrical signals, leading to inefficiencies in device integration and connectivity.
Innovation Solution
A vertical type semiconductor device design featuring pillar structures with stacked word lines and connecting patterns that allow for electrical coupling at the same level, simplifying the wiring by using a conductive material including barrier metal and tungsten, and reducing the need for additional connecting wirings through the use of connecting patterns that connect side walls of adjacent word lines.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If word lines are vertically stacked in a vertical type semiconductor device, then device integration density is improved, but wiring design complexity increases
Solution Approach 1:
The patent transitions from conventional planar word line arrangement to a vertical stacked configuration, utilizing the third dimension (vertical direction) to increase integration density. Multiple word lines are stacked vertically above each other, allowing higher device capacity without proportionally increasing planar area, thus resolving the contradiction between integration density and wiring complexity.
Solution Approach 2:
The word line structure is segmented into multiple discrete stacked layers, with each word line independently positioned at different vertical levels. This segmentation allows for modular wiring design where each word line can be controlled independently, simplifying the overall wiring architecture despite the vertical stacking configuration.
2Reliability
If additional connecting wirings are added to connect stacked word lines, then electrical connectivity between word lines is improved, but device complexity increases
Solution Approach 1:
Adjacent word lines at the same vertical level are merged into a single conductive structure through shared connecting wirings. Instead of providing separate connections for each word line, the patent combines adjacent word lines that share common electrical pathways, reducing the total number of connecting wirings needed while maintaining proper electrical connectivity across all word lines.
Data Source
AI summary
A vertical type semiconductor device includes first and second word line structures that include first and second word lines. The word lines surround a plurality of pillar structures, which are provided to connect the word lines to corresponding string select lines. Connecting patterns electrically connect pairs of adjacent first and second word lines in a same plane. The device may be a nonvolatile memory device or a different type of device.