Vertical Signal Line Acceleration in Solid-State Imaging Devices
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Solution Overview
Problem
The speed of operation of CMOS image sensors is limited by the responsiveness of the vertical signal line, which takes a significant amount of time to converge to reset or readout levels, hindering further increases in speed beyond a 7.6 times enhancement achieved with two-step single-slope type ADCs.
Innovation Solution
Incorporating acceleration circuits that shift the potential of the vertical signal line in advance before signal readout, combined with an acceleration control circuit to manage timing, allowing the potential to be set to a stable level quickly, thereby reducing response time and improving signal transmission speed.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If the vertical signal line is used to transmit signals from pixels, then signal transmission is achieved, but the response time is too long and limits further speed increases
Solution Approach 1:
The acceleration circuit shifts the potential of the vertical signal line in advance before the signal is read out from the pixel. This preliminary action prepares the signal line to be ready to receive the signal quickly, reducing the convergence time and enabling faster signal transmission without increasing the complexity of the pixel structure.
2Loss of time
If the potential of the vertical signal line is shifted in advance using acceleration circuits, then response time is reduced, but device complexity increases
Solution Approach 1:
An acceleration control circuit is introduced as an intermediary component to manage the timing and operation of the acceleration circuits. This mediator coordinates the potential shifting operation with the pixel readout timing, reducing the response time of the vertical signal line while keeping the added complexity manageable through centralized control.
Data Source
AI summary
According to one embodiment, in a pixel array unit, pixels that accumulate photoelectrically converted charges are arranged in a matrix shape. A vertical signal line transmits a signal read out from the pixels in the vertical direction. An acceleration circuit shifts the potential of the vertical signal line in advance before a signal is read out from the pixels. The acceleration control circuit controls timing for shifting the potential of the vertical signal line in advance. The timing control circuit generates a control signal for controlling the acceleration control circuit.