Vertical SOI SCR Trigger Layout to Eliminate Darlington Loss
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Solution Overview
Problem
Existing semiconductor structures, particularly in bulk regions of semiconductor on insulator (SOI) materials, face issues with high power dissipation, lower switching speed, and poor voltage scaling due to the Darlington effect in trigger diodes used for high-power applications, which limits their effectiveness in devices requiring efficient ESD protection and high voltage control.
Innovation Solution
A trigger silicon controlled rectifier (SCR) circuit is designed with a single crystalline semiconductor trigger element integrated vertically between the anode and cathode of the SCR, beneath a buried insulator layer, eliminating the Darlington effect and allowing for area-efficient vertical integration without additional process changes, using polysilicon gate material and fabrication techniques from integrated circuit technology.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If bulk string diodes are used for ESD protection in RF-switches, then ESD protection is provided, but high power dissipation and lower switching speed occur due to the Darlington effect
Solution Approach 1:
The patent transitions from a lateral connection architecture to a vertical integration architecture. The trigger diode and SCR are stacked vertically in the bulk region, with the trigger diode positioned above the SCR. This vertical arrangement eliminates the Darlington effect while maintaining ESD protection functionality, thereby reducing power dissipation and improving switching speed.
2Ease of operation
If lateral connection is used between trigger diode and SCR, then circuit functionality is achieved, but area inefficiency occurs
Solution Approach 1:
The patent reconfigures the circuit from a lateral layout to a vertical stack. The trigger diode is positioned directly above the SCR in the bulk region, utilizing the vertical dimension for interconnection. This eliminates the need for lateral routing, significantly reducing the occupied area while preserving the trigger circuit's functionality.
3Reliability
If trigger diodes are built in SOI and laterally connected with SCR, then ESD protection is enhanced, but area requirements increase
Solution Approach 1:
The patent implements a vertical stacking architecture where the SOI trigger diode is positioned directly above the SCR in the bulk region. This vertical integration eliminates lateral routing requirements, reducing the overall area footprint while maintaining enhanced ESD protection capabilities through the trigger diode-SCR configuration.
Data Source
Figure 1A~1B
Figure 1C~1D
Figure 1E~1F
AI summary
The present disclosure relates to a structure including a trigger element within a semiconductor-on-insulator (SOI) substrate, and a silicon controlled rectifier (SCR) under a buried insulator layer of the SOI substrate. The trigger element is between an anode and a cathode of the SCR.