Vertical Spiral Inductor Structure for Semiconductor Devices

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Conventional inductor structures in semiconductor devices consume significant substrate area, leading to increased chip size and cost, and suffer from power loss and performance degradation due to eddy currents induced in the semiconductor substrate at high frequencies.

Innovation Solution

The inductor structures are designed with spirals oriented vertically in dielectric materials above the semiconductor substrate, reducing magnetic interaction with the substrate and minimizing eddy currents, while using substrate shields to further reduce magnetic field penetration and enhance performance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Area of moving object

If conventional horizontal inductor structures are used, then inductance value can be achieved, but substrate area consumption increases significantly

Engineering Contradiction:
Improvesubstrate areaVSAvoidinductance performance
Core Design Contradiction:
Area of moving objectVSReliability

Solution Approach 1:

The patent transitions from conventional horizontal planar inductor structures to vertical three-dimensional inductor structures. The inductor windings are arranged vertically above the substrate surface rather than horizontally on the substrate plane, utilizing the third dimension (height) to achieve the required inductance value with significantly reduced substrate area footprint.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Loss of energy

If conventional horizontal inductor structures are used, then inductance can be provided, but eddy currents are induced in the semiconductor substrate causing power loss

Engineering Contradiction:
Improvepower lossVSAvoidinductor efficiency
Core Design Contradiction:
Loss of energyVSReliability

Solution Approach 1:

The patent extracts the inductor structure from the substrate plane and positions it vertically above the substrate surface. This separation removes the direct magnetic coupling between the horizontal inductor windings and the substrate, preventing eddy currents from being induced in the semiconductor substrate and eliminating the associated power losses.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent introduces dielectric layers as intermediary materials between the vertical inductor windings and the semiconductor substrate. These dielectric layers act as magnetic shields and electrical insulators, further preventing magnetic field penetration into the substrate and blocking eddy current formation while maintaining the inductor's electromagnetic functionality.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Area of stationary object

If conventional horizontal inductor structures are used, then circuit functionality is achieved, but chip size must be increased to accommodate the inductor

Engineering Contradiction:
Improvechip sizeVSAvoidintegration density
Core Design Contradiction:
Area of stationary objectVSProductivity

Solution Approach 1:

By transitioning to vertical inductor structures that extend above the substrate surface, the patent enables high inductance values to be achieved within a compact footprint on the chip. This three-dimensional arrangement dramatically reduces the substrate area required for inductors, thereby increasing the overall integration density and allowing more functional elements to be packed into the same chip area.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This design achieves a higher quality factor, reduces substrate area usage, and minimizes power loss by isolating eddy currents in dielectric materials, resulting in more efficient and predictable performance at high frequencies.

Implementation Method 1

The magnetic fields produced by the inductor spiral are situated above the substrate surface and in the dielectric

Methodology Applied
Scientific EffectMagnetic field generation: Magnetic Field

Implementation Method 2

In the presence of a magnetic field, electromagnetic induction results in an induced electromagnetic force, emf, which produces local currents in the conducting core normal to the magnetic flux

Methodology Applied
Scientific EffectElectromagnetic induction: Electromagnetic Induction

Implementation Method 3

These currents are called eddy currents and the eddy currents are undesirably formed in the semiconductor substrate due to the location of the magnetic field

Methodology Applied
Scientific EffectEddy currents: Eddy Currents

Data Source

PatentUS9508480B2Vertical slow-wave symmetric inductor structure for semiconductor devices
Publication Date: 2016.11.29 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US9508480B2 patent drawing
  • US9508480B2 patent drawing
  • US9508480B2 patent drawing

AI summary

A vertical inductor structure in a semiconductor device includes a plurality of vertically oriented spirals that produce magnetic field in a dielectric material above the surface of a semiconductor substrate thereby preventing any eddy currents from propagating in the substrate. An inductor shield structure is also provided. The inductor shield structure is formed over the substrate surface and between an inductor such as the vertical inductor structure or other inductor types and also prevents eddy currents from being induced in the substrate. The inductor shield may surround the inductor to various degrees.