Vertical Stack Transistor Aperture Ratio Resolution
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Solution Overview
Problem
The decrease in aperture ratio of organic light emitting display devices due to increased transistors per pixel leads to a shorter lifespan of the organic light emitting diode, which affects the display's performance and efficiency.
Innovation Solution
A vertical stack transistor structure is implemented, where two transistors are stacked vertically, sharing a common gate and electrode, and a storage capacitor is used to connect the gate electrode and power line, allowing for efficient current flow and increased aperture ratio, thereby enhancing the lifespan and performance of the organic light emitting diode.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If more transistors are provided in each pixel to accommodate high-resolution panels, then the resolution is improved, but the aperture ratio is decreased
Solution Approach 1:
The patent transitions from a planar transistor layout to a vertical three-dimensional stack structure. Multiple transistors are stacked vertically along the thickness direction of the substrate, utilizing the third dimension (vertical direction) to accommodate more transistors within the same pixel area. This vertical stacking enables high-resolution display while maintaining a large aperture ratio by reducing the horizontal footprint of each transistor.
2Device complexity
If the aperture ratio of each pixel is decreased, then more transistors can be accommodated, but the lifespan of the organic light emitting diode is decreased
Solution Approach 1:
By stacking transistors vertically in the thickness direction, the patent reduces the area occupied by transistor structures in the pixel plane. This vertical arrangement minimizes the light-blocking effect of transistor electrodes and interconnects, thereby increasing the aperture ratio and allowing more light to reach the organic light emitting diode, which extends its operational lifespan.
Solution Approach 2:
The vertical stack structure integrates multiple transistors and their associated electrodes into a compact three-dimensional configuration. The shared substrate and vertical interconnect structures serve multiple transistors simultaneously, reducing the overall material footprint and light obstruction while maintaining the required transistor count for high-resolution display.
3Measurement precision
If more transistors are provided in each pixel, then higher resolution is achieved, but power consumption increases
Solution Approach 1:
The vertical stacking architecture reduces the area of pixel circuit structures that block light from reaching the organic light emitting diode. By minimizing the horizontal footprint of transistors and their interconnects through vertical arrangement, more light can efficiently reach the light-emitting layer, improving light utilization efficiency and reducing the energy required to achieve the desired display brightness.
Data Source
AI summary
A vertical stack transistor includes: a first transistor and a second transistor, located in a vertical direction, wherein the first transistor includes a first gate electrode, a first insulating layer, a first electrode, a first channel, and a second electrode, which are sequentially stacked in the vertical direction, and the second transistor includes a second gate electrode, a second insulating layer, a third electrode, a second channel, and a fourth electrode, which are sequentially stacked in the vertical direction, wherein the second gate electrode and the second electrode are the same electrode.