Vertical Stacked Memory Cell Design for High Integration Density
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Solution Overview
Problem
Conventional semiconductor memory devices with variable resistor elements face challenges in high circuitry integration, current leakage between memory cells, and variations in characteristics, which affect writing and reading operations, especially due to uneven external resistance and magnetic field requirements.
Innovation Solution
A memory cell design featuring a variable resistor element with a perovskite-type oxide material sandwiched between electrodes, combined with a transistor element that controls current flow, allowing for improved integration, reduced current leakage, and operation at lower voltages, using a bipolar transistor configuration and specific electrode materials to enhance storage capacity and reliability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If the electrode at each bit is connected with the wire line to evaluate characteristics of thin film material, then the characteristics evaluation is enabled, but the degree of circuitry integration cannot be increased
Solution Approach 1:
The patent transitions from a planar wire-line connection architecture to a vertical stacked architecture where the variable resistor element is positioned above the bipolar transistor. This dimensional change allows current to flow vertically through the stack, enabling higher integration density while maintaining the ability to evaluate thin film material characteristics through the vertical current path.
2Device complexity
If conventional variable resistor elements are used without transistor control, then the device structure remains simple, but current leakage occurs between memory cells
Solution Approach 1:
The bipolar transistor serves as an intermediary control element between the control lines and the variable resistor element. It regulates current flow to the selected memory cell, preventing current leakage to adjacent cells. The transistor's switching action isolates unselected cells, maintaining reliability while adding only necessary control functionality.
3Reliability
If high voltage pulses are applied to change resistance in perovskite material, then the resistance change effect is achieved, but the power consumption increases and operation at lower voltages is not possible
Solution Approach 1:
The patent employs dynamic voltage control through the bipolar transistor, which amplifies small base current signals to control larger collector-emitter current flow. This dynamic control enables the variable resistor element to undergo resistance changes at lower operating voltages, reducing power consumption while maintaining the effectiveness of the resistance change effect through controlled current pulses.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution enables higher storage capacity, minimized current leakage, and stable operation at lower voltages, improving the reliability and efficiency of semiconductor memory devices by controlling current flow and reducing variations in memory cell characteristics.
Implementation Method 1
a perovskite material, which has a super magneto-resistance effect, to reversibly modify the electrical resistance
Implementation Method 2
a bipolar transistor, the emitter, the base, and the collector of which are layered in the same direction as the first electrode, the variable resistor body, and the second electrode in the variable resistor element are layered
Data Source
AI summary
A memory cell in a semiconductor memory device comprises a variable resistor element configured so that a variable resistor body is sandwiched between a first electrode and a second electrode, and a transistor element capable of controlling a flow of current in the variable resistor element, wherein the transistor element and the variable resistor element are placed one over the other along a direction in which the first electrode, the variable resistor body, and the second electrode of the variable resistor element are layered, and one of the first electrode and the second electrode of the variable resistor element is connected to one electrode of the transistor element.