Vertically Separated Storage Nodes and Access Devices

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

As design rules shrink, semiconductor space for fabricating memory devices like DRAM arrays becomes limited, leading to challenges in reducing contact resistance and accommodating materials with lower mobility in existing memory technologies.

Innovation Solution

A three-dimensional memory design with horizontally oriented access devices and storage nodes, where the second source/drain region has a larger horizontal surface area than vertical surface area, providing improved contact resistance and allowing for the use of materials with lower mobility by increasing the interface area with storage nodes.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If design rules are shrunk to increase memory density, then semiconductor space is reduced, but contact resistance increases and material mobility is limited

Engineering Contradiction:
Improvememory densityVSAvoidcontact resistance
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent transitions from planar contact interfaces to three-dimensional vertical contacts extending through multiple memory cell layers. This dimensional change allows contacts to reach storage nodes at different vertical levels, maintaining low contact resistance despite reduced planar space. The contact structure extends in the vertical dimension to accommodate higher density while preserving electrical performance.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Productivity

If contact area is reduced to increase cell density, then more cells fit in space, but contact resistance increases

Engineering Contradiction:
Improvecell densityVSAvoidcontact resistance
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The contact structure extends vertically through multiple layers to reach storage nodes at different heights. This vertical extension compensates for reduced planar contact area, maintaining sufficient contact area for low resistance while allowing higher cell density in the horizontal plane.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The contact structure is nested within the three-dimensional memory cell stack, with contacts positioned to reach storage nodes at various vertical levels. This nested arrangement allows multiple contacts to share vertical space efficiently, maintaining low resistance contacts while maximizing cell density.

Inventive Principle:
Principle #7Nested doll (Nesting)

Data Source

PatentUS11469230B2Vertically separated storage nodes and access devices for semiconductor devices
Publication Date: 2022.10.11 MICRON TECHNOLOGY INC
  • US11469230B2 patent drawing
  • US11469230B2 patent drawing
  • US11469230B2 patent drawing

AI summary

Systems, methods and apparatus are provided for an array of vertically stacked memory cells. The vertically stacked memory cells have horizontally oriented access devices having a first source/drain region, a channel region, and a second source drain and storage nodes that are vertically separated from the access devices.