Vertical String Driver Field Management for 3D Memory Scaling
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Solution Overview
Problem
Traditional string drivers for stacked silicon CMOS memory devices have horizontal geometries that restrict the density of vertical channels, limiting the scalability of 3D memory devices due to area constraints and high voltage handling limitations.
Innovation Solution
A driver circuit with a gate conductor and a field management structure, such as a staircase gate, that creates an electric field peak in the vertical channel, enabling higher breakdown voltage and improved drive current, allowing for scalable vertical string drivers above the memory array instead of beneath it.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If traditional horizontal geometry string drivers are used, then the driver circuit can be placed beneath the stacked array, but the area constraints limit the density of vertical channels and restrict scalability
Solution Approach 1:
The string driver is repositioned from a horizontal geometry beneath the stacked array to a vertical geometry above the memory array. This dimensional change allows the driver to utilize the vertical space above the array, freeing up die area and enabling higher density of vertical channels without increasing the horizontal footprint.
2Reliability
If vertical string drivers are implemented without field management structure, then the structure can be simplified, but the breakdown voltage is insufficient for high voltage handling
Solution Approach 1:
A field management structure is implemented at the gate corner region of the vertical string driver. This localized structure creates an electric field peak specifically at the gate corner, which enhances the breakdown voltage in that critical region without requiring complex modifications throughout the entire device structure.
Solution Approach 2:
The field management structure modifies the electric field distribution parameter by creating a controlled field peak at the gate corner. This parameter change enables the device to withstand higher voltages by concentrating the electric field in a specific region, thereby increasing the overall breakdown voltage of the vertical string driver.
3Reliability
If polysilicon is used as channel material without proper field management, then manufacturing can be simplified, but the on-state resistance is too high
Solution Approach 1:
The field management structure is specifically implemented at the gate corner region to create a localized electric field peak. This localized enhancement improves the drive current and reduces on-state resistance in the critical conduction path without requiring changes to the bulk polysilicon channel material, thus maintaining ease of manufacture.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution enhances the breakdown voltage by over three times and improves drive current, enabling the use of polysilicon as a channel material while reducing on-state resistance, thus allowing for denser and more scalable 3D memory devices.
Implementation Method 1
A driver circuit with a gate conductor and a field management structure, such as a staircase gate, that creates an electric field peak in the vertical channel
Data Source
AI summary
A driver circuit for a three-dimensional (3D) memory device has a field management structure electrically coupled to a gate conductor. The field management structure causes an electric field peak in a vertical channel of the 3D memory device when a voltage differential exists between the source conductor and the drain conductor and the gate conductor is not biased. The electrical field peak can adjust the electrical response of the driver circuit, enabling the circuit to have a higher breakdown threshold voltage and improved drive current. Thus, the driver circuit can enable a scalable vertical string driver that is above the memory array instead of under the memory array circuitry.