Vertical String Driver for Memory Array Area Optimization
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Solution Overview
Problem
Existing memory devices face challenges in maximizing storage capacity and minimizing costs due to the occupation of valuable area by string driver circuits, especially in three-dimensional memory arrays where coupling these circuits to vertical layers is complex, leading to reduced memory cell count and increased costs.
Innovation Solution
Implementing a vertical string driver positioned above the memory array, where semiconductor devices and select gate devices are formed in a common layer, allowing for a 'staircase' arrangement of word lines and reducing the need for through-array-vias, thereby optimizing area utilization and reducing processing costs.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If string driver circuits are positioned adjacent to or within the memory array, then memory access control is achieved, but valuable substrate area is occupied reducing memory cell density
Solution Approach 1:
The patent positions string driver circuits above the memory array in a vertical configuration rather than adjacent to or within the array plane. This dimensional transition from 2D lateral placement to 3D vertical placement frees substrate area for additional memory cells while maintaining electrical connection through vertical vias and conductive structures.
Solution Approach 2:
Instead of placing driver circuits at the traditional location (adjacent to or within the array), the patent inverts the conventional architecture by positioning them above the array. This inversion resolves the area conflict by utilizing previously unused vertical space above the memory structure.
2Reliability
If through-array-vias are used to couple substrate circuits to vertical layers, then electrical connection is achieved, but processing complexity and costs increase
Solution Approach 1:
The patent forms conductive structures and vias during intermediate fabrication stages before completing the memory array assembly. By preparing connection pathways in advance, the need for complex post-assembly via formation is reduced, simplifying the overall manufacturing process while ensuring reliable electrical coupling.
Solution Approach 2:
The patent integrates string driver circuit formation with memory array fabrication by combining multiple processing steps into unified sequences. Circuit patterns, vias, and conductive structures are formed concurrently rather than sequentially, reducing total processing steps and manufacturing complexity.
Data Source
AI summary
A memory device comprises a substrate and a memory array disposed above the substrate, the memory array comprising a plurality of vertically stacked layers, each vertically stacked layer comprising a plurality of word lines. The memory device further comprises a plurality of vertical string driver circuits disposed above the memory array, wherein each of the plurality of vertical string driver circuits comprises one or more semiconductor devices coupled to a respective one of the plurality of word lines.