Vertical Support Patterns for Memory Cell Structural Stability
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Solution Overview
Problem
Next-generation memory devices, such as PRAM and RRAM, face challenges due to the narrow width of memory cell structures and low Young's Modulus of germanium-antimony-tellurium (GST) used as data storage materials, leading to issues like wiggling, leaning, or collapsing during etching or cleaning processes.
Innovation Solution
A semiconductor device with a vertical structure is designed, featuring conductive patterns, insulating patterns with recess portions of different depths and widths, and a vertical structure that passes through the insulating pattern to support the memory cell structure, preventing defects like inclination or collapse.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the width of memory cell structures is reduced to increase integration density, then the integration density is improved, but the structural stability deteriorates leading to wiggling, leaning, or collapsing during etching or cleaning
Solution Approach 1:
The support structure is segmented into multiple vertical support patterns distributed across the substrate, with each support pattern providing localized reinforcement to narrow memory cell structures. This segmentation allows integration density improvement while maintaining structural stability through distributed support points.
Solution Approach 2:
Vertical support patterns act as intermediary structures between the substrate and the memory cell structures. These support patterns provide mechanical reinforcement to narrow memory cell structures during etching and cleaning processes, preventing wiggling, leaning, or collapsing while allowing the memory cell structures to maintain their narrow dimensions for high integration density.
2Adaptability or versatility
If the Young's Modulus of GST data storage material is low to enable phase change functionality, then the phase change capability is improved, but the structural rigidity deteriorates causing pattern collapse during manufacturing
Solution Approach 1:
Vertical support patterns serve as intermediary mechanical support structures that compensate for the low structural rigidity of GST data storage material. These support patterns provide the necessary mechanical strength during manufacturing processes while allowing the GST material to maintain its low Young's Modulus for effective phase change functionality.
Solution Approach 2:
The device structure combines GST data storage material with vertical support patterns made of mechanically stronger materials. This composite structure allows the GST material to exhibit its phase change properties while the support patterns provide the structural rigidity needed to prevent pattern collapse during manufacturing processes.
3Reliability
If vertical support structures are added to prevent pattern collapse, then the structural stability is improved, but the device complexity increases
Solution Approach 1:
Vertical support patterns are strategically positioned only in regions where memory cell structures require reinforcement, rather than uniformly across the entire device. This local quality approach provides structural stability where needed while minimizing the overall increase in device complexity.
Solution Approach 2:
The vertical support patterns serve multiple functions: providing mechanical reinforcement to prevent pattern collapse, defining etching regions, and serving as structural templates for subsequent manufacturing steps. This multi-functionality reduces the need for additional separate structures, thereby limiting the increase in device complexity while maintaining improved structural stability.
Data Source
AI summary
A semiconductor device is provided including a plurality of first conductive patterns disposed on a substrate. A first insulating pattern is disposed between the plurality of first conductive patterns. A plurality of second conductive patterns is disposed on the plurality of first conductive patterns. A first memory cell structure is disposed between the plurality of first conductive patterns and the plurality of second conductive patterns. A second insulating pattern is disposed on the first insulating pattern and on a side surface of the first memory cell structure. A first vertical structure is disposed on the first insulating pattern and passing through the second insulating pattern to an upper surface of the substrate. The first insulating pattern has a plurality of recess portions. The plurality of recess portions include a first recess portion and a second recess portion. The first recess portion and the second recess portion have different depths.