Semiconductor Module Structure With Vertical Control Terminals
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Solution Overview
Problem
There is a demand for energy-saving, sophisticated, and smaller electronic devices, which requires improved performance and reduced size of semiconductor modules used in these devices.
Innovation Solution
A semiconductor module configuration that includes a conductive substrate, semiconductor elements with switching functions, control terminals, and a sealing resin, where the control terminal protrudes and extends along the thickness direction, covering the substrate and semiconductor elements, and the sealing resin covers the entire assembly.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Volume of moving object
If conventional semiconductor module configuration is used, then structure is simple and easy to manufacture, but module size is large and performance is limited
Solution Approach 1:
The patent applies dimensionality change by transitioning from a planar substrate configuration to a three-dimensional stacked architecture. Multiple semiconductor elements are vertically stacked on top of each other on the insulating substrate, with conductive layers connecting them through vertical pathways. This vertical stacking enables compact integration while reducing the horizontal footprint of the module, effectively solving the contradiction between miniaturization and manufacturing simplicity.
Solution Approach 2:
The patent implements nesting by placing multiple semiconductor elements within a compact vertical space on the insulating substrate. The elements are arranged in a nested configuration where each element occupies a specific vertical level, and conductive layers are embedded within the substrate structure to connect these nested elements. This nested arrangement achieves high integration density without significantly increasing the overall module footprint or manufacturing complexity.
2Volume of moving object
If module size is reduced, then integration density increases, but parasitic inductance components increase
Solution Approach 1:
The patent introduces conductive layers as intermediary elements that provide optimized current pathways between the semiconductor elements and external terminals. These conductive layers are strategically positioned within the insulating substrate to create low-inductance connections. The intermediary conductive structures enable compact element arrangement while maintaining effective current flow paths that minimize parasitic inductance, thus resolving the contradiction between miniaturization and electrical performance.
Solution Approach 2:
The patent applies local quality by creating region-specific conductive pathways within the insulating substrate that are optimized for minimizing inductance in critical areas. The conductive layers are selectively positioned near the semiconductor elements and along current flow paths, providing locally optimized electrical characteristics. This localized optimization of conductive structures reduces parasitic inductance in the compact module configuration without requiring uniform changes throughout the entire module structure.
Data Source
AI summary
A semiconductor module includes a conductive substrate, a semiconductor element, a control terminal, and a sealing resin. The conductive substrate has an obverse surface and a reverse surface that are spaced apart from each other in a thickness direction. The semiconductor element is electrically bonded to the obverse surface and has a switching function. The control terminal is configured to control the semiconductor element. The sealing resin has a resin obverse surface and a resin reverse surface, and covers the conductive substrate, the semiconductor element, and a part of the control terminal. The control terminal protrudes from the resin obverse surface, and extends along the thickness direction.


