Vertical Thin-Film Transistor Via-Contact Layout for Channel Stability
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Solution Overview
Problem
Existing thin-film transistors with a vertical structure face stability issues due to ion diffusion from the ohmic contact region into the channel, leading to poor device stability.
Innovation Solution
A thin-film transistor with a vertical structure is designed, featuring an insulating substrate, an active layer with a stacked first and second doped portion, and an insulating layer with via holes, where the second doped portion is connected to the channel portion through these holes, reducing the contact area and ion diffusion.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If a vertical structure thin-film transistor is used to reduce channel length, then mobility is improved, but ion diffusion from ohmic contact region into channel causes stability to deteriorate
Solution Approach 1:
The active layer is segmented into distinct functional regions: a first doped portion (ohmic contact region), a channel portion, and a second doped portion. This segmentation allows each region to be optimized independently, with the channel portion having controlled doping to prevent ion diffusion while maintaining high mobility for carrier transport.
Solution Approach 2:
Different regions of the active layer are assigned different doping concentrations and material compositions tailored to their specific functions. The channel portion has lower doping concentration to prevent ion diffusion and maintain stability, while the ohmic contact regions have higher doping for low resistance contact, achieving local optimization of both mobility and stability.
2Speed
If channel length is reduced to improve mobility, then occupied area of active layer increases, but channel length is limited by process
Solution Approach 1:
The transistor structure transitions from a planar configuration to a vertical configuration, where the channel extends in the thickness direction rather than the lateral direction. This dimensional change allows the channel length to be defined by film thickness which can be precisely controlled by deposition processes, enabling shorter effective channel lengths without increasing lateral occupied area.
Solution Approach 2:
The channel length parameter is changed from a lateral dimension (limited by lithography resolution) to a vertical dimension (controlled by thin film deposition thickness). This parameter transformation enables achieving shorter channel lengths (e.g., 50-200 nm) that are processable with existing thin film technologies, thereby improving mobility while maintaining compact device footprint.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration allows for a polysilicon thin-film transistor with an extremely small channel length, improving device stability and aperture ratio, facilitating high-resolution and high-refresh-rate display panel development.
Implementation Method 1
ions in the ohmic contact region easily diffusing into a channel and causing device stability to deteriorate
Data Source
AI summary
The present application provides a thin-film transistor having a vertical structure and an electronic device. In the thin-film transistor having the vertical structure, the thin-film transistor includes a first doped portion and a second portion, the second doped portion is connected to and partly in contact with a channel portion through a via hole by arranging the second doped portion in the via hole of an insulating layer, which can reduce a contact area between the second doped portion and the channel portion, thereby reducing ions diffusing into a channel region and improving device stability of the thin-film transistor. Also, in the thin-film transistor having the vertical structure, a projection area of the thin-film transistor can be reduced, improving an aperture ratio of a display panel.