3D Vertical Thin-Body Transistor Structure for Low Leakage
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Solution Overview
Problem
Conventional transistor structures face challenges in reducing standby current (Ioff) below 1 pA and controlling leakage currents as device dimensions are scaled down, leading to increased leakage paths and short channel effects, making it difficult to achieve Tera-Scale Integration (TSI) requirements.
Innovation Solution
A new 3D transistor structure with a convex body and trench design, featuring a conductive central pole surrounded by a gate dielectric layer, and multiple vertical thin bodies with conductive channels, which reduces leakage current and enhances conduction during the ON state by controlling the effective channel length and aligning source/drain edges with the gate structure.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If device dimensions are scaled down to increase integration capacity, then transistor density is improved, but leakage current increases
Solution Approach 1:
The active region is segmented into multiple vertical thin bodies (e.g., four separate bodies) instead of a single continuous fin structure. Each thin body is isolated from adjacent bodies, creating discrete conduction paths. This segmentation allows independent control of each body's channel length while maintaining high integration density, effectively reducing leakage current through better junction control.
Solution Approach 2:
The invention transitions from a conventional 2D planar fin structure to a 3D vertical architecture with multiple thin bodies extending upward from the substrate. This dimensional change enables better control of leakage paths through the vertical dimension while maintaining high transistor density through the multi-body configuration.
2Ease of manufacture
If conventional FinFET structure is used, then manufacturing is simplified, but Ioff reduction below 1 pA cannot be achieved
Solution Approach 1:
Different regions of the active structure are given different properties: each vertical thin body has its own optimized channel length, and the junction depths can be independently controlled. This local quality approach allows each body to be optimized for low leakage while maintaining overall manufacturing simplicity through standardized processes applied to multiple identical structures.
3Ease of manufacture
If LDD region penetrates underneath gate structure, then ion-implantation process is simplified, but effective channel length is shortened
Solution Approach 1:
The LDD region formation process is extracted and separated from the main ion-implantation sequence. By using a dedicated LDD formation step with specific masking and implantation parameters, the LDD regions can be precisely controlled to not penetrate underneath the gate structure, thereby preserving the full effective channel length while maintaining manufacturing feasibility.
Data Source
AI summary
A transistor structure includes a body and a gate structure. The body has a single convex structure, wherein the convex structure is made of a first semiconductor material, and a trench is formed in the single convex structure. The gate structure has a gate conductive layer and a gate dielectric layer, wherein the gate conductive layer is across over the single convex structure, and a portion of the gate conductive layer is filled in the trench.