Vertical Through Connections in Embedded Component Packaging
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Solution Overview
Problem
In 3D packaging applications, there is a challenge in enhancing the density of connections between embedded components from the top to the bottom side of a package in standard Embedded Component Packaging (ECP) models, where connections need to be routed out from dense signal areas and back up, leading to inefficiencies in component carrier density.
Innovation Solution
A component carrier with a stack of electrically conductive and insulating layer structures, embedding a component and forming vertical through connections, such as through silicon vias (TSV), which are connected to vias in the insulating layer structures to enhance connectivity and density, allowing for direct laser via stacking and minimal investment.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If standard ECP packaging model is used with connections routed out from dense signal areas and back up, then component carrier can accommodate embedded components, but connection density is reduced and routing efficiency deteriorates
Solution Approach 1:
The patent transitions from horizontal routing through dense signal areas to vertical routing through the component substrate using through-silicon vias (TSVs). This dimensional change from 2D planar routing to 3D vertical routing eliminates the need to route connections through congested horizontal paths, thereby increasing connection density and reducing routing complexity simultaneously.
2Reliability
If vertical through connections are implemented through the component, then direct connectivity between top and bottom sides is achieved, but manufacturing process complexity increases
Solution Approach 1:
The manufacturing process is divided into distinct sequential steps: forming via holes through the component substrate, depositing conductive material within the via holes to create TSVs, and integrating these vertical connections with the component electrodes. This segmentation of the complex manufacturing process into manageable stages improves reliability while making the overall process more controllable and easier to manufacture.
3Temperature
If connections are routed horizontally through dense signal areas, then component can be embedded in standard ECP model, but heat dissipation efficiency deteriorates
Solution Approach 1:
The patent redirects heat dissipation pathways from horizontal conduction through dense signal layers to vertical conduction through the component substrate via TSVs. This dimensional shift creates dedicated thermal pathways that are independent of the horizontal signal routing, improving heat dissipation efficiency without compromising signal routing productivity.
Data Source
AI summary
A component carrier and a method of manufacturing the same are disclosed. The component carrier includes a stack having at least one electrically conductive layer structure and/or at least one electrically insulating layer structure, a component embedded in the stack, and at least one vertical through connection extending between two opposing main surfaces of and through the component.