Vertical Transfer Gate for BSI CMOS Image Sensors
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Solution Overview
Problem
Back-side illumination (BSI) CMOS image sensors employing global shutter capture face challenges due to floating diffusion regions (FDRs) being laterally adjacent to photodetectors, reducing fill factor and quantum efficiency, and being poorly protected from radiation, leading to imaging artifacts.
Innovation Solution
The implementation of a vertical transfer gate structure where the FDR is vertically spaced from the photodetector, with a metal gate laterally adjacent to a gate dielectric layer filling a lateral recess, increasing the fill factor and shielding the FDR from radiation, and reflecting long wavelengths back to the photodetector.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If floating diffusion regions are placed laterally adjacent to photodetectors, then device integration is achieved, but fill factor and quantum efficiency are reduced
Solution Approach 1:
The patent transitions from lateral placement to vertical placement of the floating diffusion region. The FDR is positioned at a different vertical level (depth) relative to the photodetector, specifically in a well region beneath the photodetector surface. This dimensional change allows both the photodetector and FDR to coexist without lateral overlap, maximizing the photodetector's fill factor while maintaining functional integration.
2Device complexity
If floating diffusion regions are placed laterally adjacent to photodetectors, then device integration is achieved, but radiation protection is insufficient leading to imaging artifacts
Solution Approach 1:
By moving the FDR to a vertical position beneath the photodetector rather than lateral adjacency, the structure creates a spatial separation that reduces radiation-induced interference. The vertical well structure provides inherent shielding and isolation from radiation affecting the photodetector surface, reducing imaging artifacts while maintaining integration.
Solution Approach 2:
The patent employs a simplified single-well structure that combines multiple functions (charge storage, radiation shielding, and artifact reduction) without requiring complex additional protective components. This cost-effective structural solution addresses radiation protection needs through the well's inherent properties rather than adding separate protective elements.
3Reliability
If vertical transfer gate structure is implemented, then quantum efficiency and radiation protection are improved, but device complexity increases
Solution Approach 1:
The vertical transfer gate structure serves multiple functions simultaneously: it enables efficient charge transfer from the photodetector to the vertically-positioned FDR, provides radiation shielding, reduces imaging artifacts, and maintains compact integration. This multi-functionality justifies the increased structural complexity by delivering multiple performance benefits from a single integrated design.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration enhances quantum efficiency and global shutter efficiency by increasing the fill factor and improving radiation protection, while also enabling anti-blooming functionality to prevent image artifacts.
Implementation Method 1
reflecting long wavelengths back to the photodetector
Data Source
AI summary
A method for manufacturing a back-side illumination (BSI) complementary metal-oxide-semiconductor (CMOS) image sensor with a vertical transfer gate structure for improved quantum efficiency (QE) and global shutter efficiency (GSE) is provided. A sacrificial dielectric layer is formed over a semiconductor region. A first etch is performed into the sacrificial dielectric layer to form an opening exposing a photodetector in the semiconductor region. A semiconductor column is formed in the opening. A floating diffusion region (FDR) is formed over the semiconductor column and the sacrificial dielectric layer. A second etch is performed into the sacrificial dielectric layer to remove the sacrificial dielectric layer, and to form a lateral recess between the FDR and the photodetector. A gate is formed filling the lateral recess and laterally spaced from the semiconductor column by a gate dielectric layer. The BSI CMOS image sensor resulting from the method is also provided.