Vertical Transistor with 2D Material Channel and Insulative Shell
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Solution Overview
Problem
Incorporating two-dimensional-materials into transistors is challenging due to adhesion issues and degradation of exposed sidewall edges, which affects charge mobility and device performance.
Innovation Solution
The use of annular-shaped two-dimensional-material structures as active material in vertical transistors, where the material is conformally deposited along insulative material and into narrowed openings, providing structural rigidity and minimizing exposed sidewall edges, and integrated into transistors with conductive and insulative layers to form channel regions between source/drain regions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If two-dimensional-materials are incorporated into transistors, then charge mobility and device performance are improved, but adhesion issues and degradation of exposed sidewall edges occur
Solution Approach 1:
The patent introduces insulative material as an intermediary between the two-dimensional-material channel and the surrounding environment. This mediator protects the channel material from direct exposure, preventing adhesion issues and sidewall edge degradation while maintaining the electrical performance benefits of the two-dimensional-material
Solution Approach 2:
The patent employs thin film structures, specifically conformally deposited insulative material layers, to encapsulate and protect the two-dimensional-material channel. These thin protective films prevent harmful interactions while maintaining the structural integrity and electrical characteristics of the channel material
2Ease of manufacture
If conventional transistor structures are used, then manufacturing is simpler, but channel length control and cross-talk prevention are limited
Solution Approach 1:
The patent transitions from planar transistor structures to vertical FET architectures, utilizing the vertical dimension to achieve better channel length control. The vertical channel extends through multiple layers, allowing precise control of channel length through layer thickness while maintaining compatibility with standard semiconductor fabrication processes
3Ease of manufacture
If two-dimensional-materials are used in planar configurations, then fabrication is easier, but exposed sidewall edges lead to degradation
Solution Approach 1:
The patent transitions from planar to vertical configurations, where the channel extends vertically through insulative material layers. This dimensional change eliminates exposed sidewall edges by enclosing the channel within conformally deposited insulative layers, preventing degradation while maintaining fabrication feasibility through standard deposition and etching processes
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration enhances charge mobility, reduces delamination risks, allows for shorter channel lengths with effective control, and avoids cross-talk interactions, improving the operational efficiency and fabrication ease of transistors.
Implementation Method 1
the material is conformally deposited along insulative material and into narrowed openings, providing structural rigidity and minimizing exposed sidewall edges
Data Source
AI summary
Some embodiments include an integrated assembly having a conductive structure, an annular structure extending through the conductive structure, and an active-material-structure lining an interior periphery of the annular structure. The annular structure includes dielectric material. The active-material-structure includes two-dimensional-material. Some embodiments include methods of forming integrated assemblies.