Vertical Transistor Air Gap Spacers for Parasitic Capacitance
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Solution Overview
Problem
Conventional vertical transistors face increased parasitic capacitance issues due to increasing density in technology nodes, which affects their performance in scaling beyond 5 nm nodes.
Innovation Solution
A semiconductor structure with air gap spacers located above and below each functional gate structure is introduced, featuring a bottom air gap spacer between the gate structures and the source/drain region and a top air gap spacer between the gate structures and the top source/drain region, which helps in reducing parasitic capacitance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If vertical transistor density is increased for technology scaling, then device density improves, but parasitic capacitance between gate and source/drain increases
Solution Approach 1:
Air gap spacers are introduced as intermediary structures between the gate and source/drain regions. These spacers create physical separation and reduce the capacitive coupling between adjacent components, thereby reducing parasitic capacitance while allowing high device density to be maintained
Solution Approach 2:
The dielectric properties of the structure are changed by introducing air gaps (which have lower permittivity than conventional dielectric materials). This parameter change in the dielectric constant directly reduces the parasitic capacitance between gate and source/drain regions
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The implementation of air gap spacers effectively reduces parasitic capacitance, enhancing the performance and scalability of vertical transistors for future technology nodes.
Implementation Method 1
a bottom air gap spacer located between a bottommost surface of first and second functional gate structures, and a topmost surface of a bottom source/drain region, and a top air gap spacer located between a topmost surface of the first and second functional gate structures and a surface of the top source/drain region
Data Source
AI summary
A semiconductor structure containing a vertical transistor having air gap spacers located above and below each functional gate structure is provided. Notably, a bottom air gap spacer is located between a bottommost surface of first and second functional gate structures and a topmost surface of a bottom source/drain region, and a top air gap spacer is located between a topmost surface of the first and second functional gate structures and a surface of the top source/drain region.