Vertical Transistor Structure for Lower Contact Resistance
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Current transistor designs face challenges in achieving optimal current flow and reduced contact resistance, particularly as miniaturization leads to increased contact resistance dominance, affecting transistor characteristics and operating speed in semiconductor memory devices.
Innovation Solution
The design incorporates a columnar portion with a tubular gate insulating film and a semiconductor layer, where the semiconductor layer is embedded in the gate insulating film and extends between the gate insulating film and the upper electrode, optimizing the contact area and reducing contact resistance by varying the film diameters and distances within the transistor structure.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the transistor is miniaturized to achieve high integration, then the integration density is improved, but the contact resistance increases and dominates the transistor characteristics
Solution Approach 1:
The invention transitions from a planar transistor structure to a vertical transistor structure where the channel extends in the vertical dimension. The columnar semiconductor layer rises from the substrate and is surrounded by a gate electrode, creating a three-dimensional configuration that increases the effective channel area without increasing the planar footprint, thereby maintaining high integration density while improving current flow capabilities
Solution Approach 2:
The gate electrode is configured to surround and enclose the columnar semiconductor layer, with the gate insulating film positioned between them. This nested arrangement allows the gate to control the channel from multiple directions, enhancing the electric field distribution and improving carrier modulation efficiency, which helps reduce the impact of contact resistance on overall device performance
2Reliability
If the contact area is increased to reduce contact resistance, then the contact resistance is improved, but the transistor area increases
Solution Approach 1:
The semiconductor layer transitions from a thin planar film to a columnar structure extending vertically. This dimensional change increases the effective contact area between the semiconductor layer and electrode structures without increasing the planar device footprint, as the additional contact area is achieved through vertical extension rather than lateral expansion
Solution Approach 2:
The columnar semiconductor layer is positioned to make specific contact with the lower electrode at its base and the upper electrode at its top, creating localized high-quality contact regions. The gate electrode surrounds the columnar layer at an intermediate height, creating a localized control region that optimizes the electric field distribution at critical contact points without requiring uniform expansion of the entire device area
Data Source
AI summary
A transistor includes an upper electrode; a lower electrode; a gate electrode disposed between the upper electrode and the lower electrode; and a columnar portion penetrating the gate electrode and provided between the upper electrode and the lower electrode. The columnar portion includes a tubular gate insulating film and a semiconductor layer, the tubular gate insulating film disposed at a first distance away from the upper electrode and in contact with the gate electrode. The semiconductor layer is embedded in the tubular gate insulating film and between the gate insulating film and the upper electrode and in contact with the upper electrode.