Vertical Transistor Source-Drain Epitaxial Growth
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
VTFET devices rely on dopant ion diffusion for source-drain region formation, which is time-consuming and yields inconsistent results, affecting device performance.
Innovation Solution
A method for fabricating VTFETs with epitaxially grown source-drain junctions beneath the fin inversion portion, using a sacrificial epitaxial layer, channel epitaxial layer, and hard mask layers to form FINs, followed by shallow trench isolation and epitaxial growth of doped source-drain regions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If dopant ion diffusion is used for source-drain region formation, then the device can be manufactured using conventional processes, but the process is time-consuming and yields inconsistent results
Solution Approach 1:
The patent changes the formation mechanism parameter from dopant ion diffusion to epitaxial growth. The source-drain regions are formed through epitaxial growth of doped semiconductor material, which grows the crystal structure directly with incorporated dopants, eliminating the time-consuming diffusion process while ensuring consistent doping profiles and reliable device performance.
Solution Approach 2:
The patent replaces the thermal diffusion mechanism with an epitaxial growth mechanism. Instead of relying on thermal energy to drive dopant ions through the silicon lattice, the invention uses controlled epitaxial deposition to grow doped source-drain regions, providing better control over doping concentration and distribution, thereby reducing fabrication time and improving consistency.
2Ease of manufacture
If dopant ion diffusion is used for source-drain region formation, then the process is simpler, but the on-resistance is higher and short channel effects are minimized less effectively
Solution Approach 1:
The patent changes the source-drain region formation from diffusion-based to epitaxial growth-based. The epitaxial process allows precise control over doping concentration, depth, and lateral dimensions by controlling growth conditions, thereby improving manufacturing precision and reducing on-resistance while better suppressing short channel effects.
Solution Approach 2:
The patent performs preliminary doping during the epitaxial growth process itself, rather than relying on subsequent diffusion. The doped semiconductor material is grown with the desired doping profile already incorporated, ensuring precise control over source-drain region characteristics and eliminating the need for separate diffusion steps.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces on-resistance and minimizes short channel effects, providing more reliable and consistent device performance by eliminating reliance on dopant diffusion.
Implementation Method 1
forming a sacrificial epitaxial layer upon a substrate
Implementation Method 2
forming a channel epitaxial layer and hard mask layer upon the sacrificial epitaxial layer
Implementation Method 3
VTFET devices may rely upon diffusion of dopant ions from highly doped epitaxial regions grown between the device fins to regions at the base of the respective fins to form the source-drain regions beneath the fins
Data Source
AI summary
A semiconductor device, and method of fabricating the device. The device including a plurality of vertical transistors, each vertical transistor having a raised semiconductor island having a first cross-sectional profile, a source-drain region disposed above the raised semiconductor island, the source-drain region having a second cross-sectional profile, and a semiconductor channel disposed above the source-drain region, the semiconductor channel having a third cross-sectional profile. The second cross-sectional profile is asymmetric.