Vertical DRAM Transistor Pair Layout for Free Body Effect Mitigation
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Solution Overview
Problem
The challenge in DRAM device scaling is exacerbated by free body effects (FBEs) in vertical channel transistors without substrate body contacts, which degrade retention and impact the ION/IOFF ratio, leading to constraints on current flow and increased leakage power.
Innovation Solution
Incorporating a body contact between pairs of vertical transistors with a conductive shield connected to a constant voltage, creating a low resistance path that mitigates FBEs and enhances the ION/IOFF ratio by engineering higher doping at the data line junctions, thereby improving performance and reducing leakage power.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Volume of moving object
If vertical channel transistors without substrate body contacts are used, then device scaling is achieved, but free body effects degrade retention and increase leakage power
Solution Approach 1:
A conductive shield is introduced as an intermediary structure between adjacent vertical channel transistors. The shield is positioned between the channel structures and connected to a constant voltage (typically ground), acting as a mediator to prevent free body effects from degrading transistor performance while maintaining the scaled-down vertical architecture.
Solution Approach 2:
The conductive shield is strategically positioned only in regions where free body effects occur between adjacent transistors, rather than throughout the entire device. This localized approach mitigates FBEs at critical interfaces while preserving the overall device scaling and performance characteristics.
2Volume of moving object
If vertical channel transistors without substrate body contacts are used, then device scaling is achieved, but the ION/IOFF ratio is impacted
Solution Approach 1:
The conductive shield serves as a mediator that stabilizes the electrical environment between adjacent transistors, preventing free body effects from disrupting the ION/IOFF ratio. By providing a controlled reference potential between channels, the shield helps maintain proper threshold voltage and current characteristics.
Solution Approach 2:
The conductive shield modifies the electrical parameters (voltage potential, electric field distribution) in the region between adjacent transistors. By changing these parameters through the shield's presence and voltage biasing, the ION/IOFF ratio is improved while maintaining the scaled vertical channel structure.
3Reliability
If conductive shield with body contact is added, then FBEs are mitigated and ION/IOFF ratio improves, but device complexity increases
Solution Approach 1:
The conductive shield is merged with existing device structures such as interlayer dielectric layers or isolation regions. By combining the FBE mitigation function with existing structural elements, the design reduces overall complexity compared to adding completely separate body contact structures to each transistor.
Solution Approach 2:
The conductive shield serves multiple functions simultaneously: it mitigates free body effects, provides electrical isolation between adjacent transistors, and can be integrated with existing interlayer dielectric structures. This multi-functionality reduces the need for additional separate structures, thereby limiting the increase in device complexity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration effectively mitigates FBEs, boosts on-state current (ION), and reduces off-state current (IOFF), leading to improved performance and reduced leakage power in DRAM devices, enabling more efficient memory cell scaling.
Implementation Method 1
Incorporating a body contact between pairs of vertical transistors with a conductive shield connected to a constant voltage, creating a low resistance path that mitigates FBEs
Implementation Method 2
a conductive body shorted to the conductive shield and positioned between the first channel structure and the second channel structure, the conductive body contacting the first channel structure and the second channel structure
Data Source
AI summary
A variety of applications can include an apparatus having an electronic device including a number of transistors in a pair-wise arrangement that can address a floating body effect associated with the type of transistor implemented in the pair-wise arrangement. The transistors can be structured as thin film transistors having one-gate separated by a gate dielectric from a vertical channel structure. The pair-wise arrangement can include a conductive shield between a channel structure of a transistor of the pair and a channel structure of the other transistor of the other pair. A conductive body can be located below the conductive shield and shorted to the conductive shield, where the conductive body contacts the channel structures of the transistors of the pair-wise arrangement. The conductive shield can be coupled to node to be set at a constant voltage in operation.