Vertical Transistor Gate Structure for Channel Control
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Solution Overview
Problem
There is a need for an effective method to form vertical field-effect transistors (VFETs) that reduces the gate length and minimizes the short channel effect, while maintaining high integration and channel control in semiconductor manufacturing.
Innovation Solution
A method involving the formation of a stacked material structure on a substrate, with trenches etched perpendicular to the surface, followed by the creation of transitional layers and a gate structure, utilizing insulation and liner layers to control the structure's dimensions and ion types to achieve a strong channel control and high integration.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of stationary object
If vertical field-effect transistors are used to reduce layout area and increase packaging density, then device integration is improved, but gate length control and short channel effect become more challenging
Solution Approach 1:
The patent transitions from planar gate structures to three-dimensional stacked gate structures, where multiple gate layers are vertically arranged. This dimensional change allows the gate length to be controlled by the thickness of the channel layer rather than lateral dimensions, enabling better gate length control while maintaining high integration.
Solution Approach 2:
The gate structure is segmented into multiple stacked layers (first gate layer, second gate layer, third gate layer) with different materials and functions. This segmentation allows independent optimization of each gate layer's thickness and material properties to achieve precise gate length control and mitigate short channel effects.
2Productivity
If gate length is reduced to increase integration density, then packaging density is improved, but short channel effect increases
Solution Approach 1:
The patent employs composite gate structures with different material layers (e.g., metal gates, dielectric layers, semiconductor layers) stacked together. Each material is selected for specific properties that collectively provide strong channel control and suppress short channel effects while enabling reduced gate lengths for high-density packaging.
Solution Approach 2:
The patent changes the physical parameters of the gate structure by varying the thickness, material composition, and stacking configuration of multiple layers. These parameter changes enable the gate to effectively control shorter channel lengths without experiencing significant short channel effects, thus achieving high packaging density.
3Reliability
If stacked material structure with multiple layers is formed to achieve vertical transistor configuration, then channel control is improved, but device complexity increases
Solution Approach 1:
The stacked material structure serves multiple functions simultaneously: the different layers provide gate control, insulation, and channel formation functions. This multi-functionality allows the complex stacked structure to achieve superior channel control while the same structure can be reused across multiple devices, effectively managing the complexity through functional integration.
Data Source
AI summary
Semiconductor structures and fabrication methods thereof are provided. The method includes providing a substrate; forming a stacked material structure on the substrate; and forming trenches in the stacked material structure. Bottoms of the trenches are in the first material layer, the trenches are arranged along a first direction and form an initial stacked structure sequentially including an initial first layer, an initial second layer and an initial third layer. The method also includes etching the initial third layer to form transitional third layers arranged along a second direction perpendicular to the first direction; removing a portion of the initial first layer and a portion of the initial second layer of the initial stacked structure at two sides along the second direction to form a stacked structure including a first layer, a second layer and the transitional third layers; and forming a gate structure.