Vertical Transistor Gate Electrode Shaping for Charge Transfer Efficiency
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Solution Overview
Problem
The inner wall of the hole portion in semiconductor substrates has varying crystallographic planes, leading to differences in gate insulating film thickness, which creates potential barriers that inhibit electric charge transfer in solid-state imaging elements.
Innovation Solution
A vertical transistor with a gate electrode and insulating film configuration where the gate electrode's cross-section is elongated parallel to the semiconductor substrate's crystallographic orientation, positioning thick-film regions at the source and drain terminals to offset potential barriers and enhance charge transfer efficiency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of stationary object
If a vertical transistor with a hole portion is used to reduce area and enlarge light-receiving area, then the area efficiency is improved, but the gate insulating film thickness becomes non-uniform due to different crystallographic planes, creating potential barriers that worsen electric charge transfer efficiency
Solution Approach 1:
The gate electrode cross-section is designed with non-uniform thickness to match the local gate insulating film thickness. The thicker portion of the gate electrode is positioned at the region where the gate insulating film is thicker (formed on the (110) crystallographic plane), thereby compensating for the potential barrier created by the thick insulating film and maintaining uniform electrical characteristics across the device
2Ease of manufacture
If the gate insulating film is formed by thermal oxidation on the hole portion inner wall, then the insulating film is created, but the different oxidation rates of (110) and (100) planes cause non-uniform film thickness that creates potential barriers
Solution Approach 1:
The gate electrode thickness parameter is varied spatially to compensate for the gate insulating film thickness variation. By making the gate electrode thicker at regions where the insulating film is thicker, the combined structure achieves more uniform electrical characteristics despite the non-uniform insulating film formation caused by different crystallographic plane oxidation rates
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration improves the transfer efficiency of electric charges by reducing potential barriers at the source and drain terminals, thereby enhancing the performance of solid-state imaging apparatuses.
Implementation Method 1
Since the (110) plane and the (100) plane differ from each other in terms of rates of thermal oxidation, a difference in film thickness in accordance with crystallographic planes is created in the gate insulating film formed on the inner wall of the hole portion
Implementation Method 2
In solid-state imaging elements including a photodiode and a transistor that reads an electric charge having been photoelectrically converted by the photodiode
Data Source
AI summary
To provide an imaging apparatus and an electronic device of which transfer efficiency of electric charges is superior. The imaging apparatus includes a semiconductor substrate and a vertical transistor provided on the semiconductor substrate. The semiconductor substrate is provided with a hole portion that opens on a side of a first principal plane. The vertical transistor has a first gate electrode provided inside the hole portion and a first gate insulating film provided between an inner wall of the hole portion and the first gate electrode. A cross section of the first gate electrode cut along a plane parallel to the first principal plane has a shape being elongated in a direction of a crystallographic orientation of the semiconductor substrate.