Vertical Transistor MRAM Structure with Shared Source Electrode

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Solution Overview

Problem

The existing Magnetic Random Access Memory (MRAM) exhibits poor electrical performance, which affects its read and write capabilities and integration level.

Innovation Solution

A semiconductor structure comprising vertical transistors and storage structures with shared source electrodes and connection structures, which reduces resistance and increases conduction current, while simplifying the manufacturing process.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional MRAM structure is used, then the basic memory function is achieved, but the electrical performance is poor

Engineering Contradiction:
Improveelectrical performanceVSAvoidread and write capability
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent transitions from planar transistors to vertical transistors, changing the dimensional orientation of the channel from horizontal to vertical. This dimensional change enables shorter channel lengths and reduced resistance while maintaining adequate gate control, directly improving electrical performance and read/write capability without sacrificing memory function.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The patent merges multiple source electrodes into a shared source electrode structure that serves multiple vertical transistors. This consolidation reduces the total resistance in the circuit by eliminating redundant source regions and improves conduction current efficiency, thereby enhancing electrical performance and productivity simultaneously.

Inventive Principle:
Principle #5Merging (Combining)

2Adaptability or versatility

If more transistors are integrated, then the integration level increases, but the resistance increases and conduction current decreases

Engineering Contradiction:
Improveintegration levelVSAvoidelectrical performance
Core Design Contradiction:
Adaptability or versatilityVSReliability

Solution Approach 1:

By stacking transistors vertically rather than arranging them horizontally, the patent achieves higher integration density in the vertical dimension. This allows more transistors to be integrated without proportionally increasing the lateral footprint, while the vertical configuration inherently provides shorter current paths and lower resistance, maintaining electrical performance despite increased integration.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The shared source electrode structure serves multiple vertical transistors simultaneously, making it a multi-functional element. This universal source region reduces the total resistance for all connected transistors and improves conduction current efficiency, enabling higher integration without the penalty of increased resistance that would normally accompany additional transistor components.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS20230157033A1Semiconductor structure and forming method therefor
Publication Date: 2023.05.18 CHANGXIN MEMORY TECH INC
  • US20230157033A1 patent drawing
  • US20230157033A1 patent drawing
  • US20230157033A1 patent drawing

AI summary

Semiconductor structure and forming method therefor are provided. The semiconductor structure includes: substrate; first vertical transistor, including first source, first channel region located on the first source, first drain located on the first channel region, and first gate dielectric layer and first gate surrounding the first channel region; first storage structure located on the first drain; second vertical transistor, including the first source, second channel region located on the first source, second drain located on the second channel region, and second gate dielectric layer and second gate surrounding the second channel region; and second storage structure located on the second drain. The first source has bottom structure, first connection structure connecting the bottom structure, the first channel region and the second channel region, and second connection structure connecting the bottom structure and located on two sides of the first channel region and the second channel region.