Self-Aligned Replacement Gate Structures for Vertical Transistors
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Solution Overview
Problem
In the manufacturing of semiconductor devices, particularly vertical transistors, existing replacement gate techniques face challenges in achieving self-aligned gate structures due to limitations in patterning processes, which affect the precise control of gate size and positioning as device dimensions shrink.
Innovation Solution
The method involves forming a vertically oriented channel semiconductor structure, a bottom spacer, and a sacrificial material layer, followed by the creation of sidewall spacers and the removal of the sacrificial layer to define replacement gate cavities, allowing for the formation of self-aligned replacement gate structures that are conductively coupled, thereby overcoming the limitations of traditional patterning processes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If traditional patterning processes are used to form gate structures, then the manufacturing process is simpler, but the control over gate size and positioning becomes imprecise as device dimensions shrink
Solution Approach 1:
The method forms sidewall spacers on the channel structure before removing the sacrificial gate material. This preliminary formation of sidewall spacers establishes precise lateral boundaries for the replacement gate, ensuring accurate gate positioning and dimensions before the actual gate formation occurs. The sidewall spacers act as pre-positioned alignment references that guide subsequent gate material deposition.
Solution Approach 2:
The patent introduces sidewall spacers as intermediary structures that mediate between the channel structure and the final gate structure. These spacers serve as temporary alignment fixtures that transfer the precise positioning information from the channel structure to the replacement gate, enabling self-aligned fabrication without requiring complex direct patterning of the gate itself.
2Area of moving object
If device dimensions are reduced to increase transistor density, then more transistors fit on chip area, but patterning process variations increase and affect gate structure precision
Solution Approach 1:
The replacement gate structure is self-aligned to the channel structure through the sidewall spacers. The gate automatically positions itself relative to the channel during the formation process, eliminating the need for separate alignment steps. This self-service alignment mechanism ensures consistent gate positioning and dimensions even as device features scale to smaller sizes, reducing the impact of patterning process variations.
3Adaptability or versatility
If sacrificial gate material is removed to form replacement gate cavities, then high-k/metal gate structures can be formed, but additional process steps are required
Solution Approach 1:
The gate formation process is segmented into distinct phases: first forming the sacrificial gate and sidewall spacers, then removing the sacrificial material to create cavities, and finally forming the replacement high-k/metal gate structure. This segmentation allows each component to be optimized independently - the sacrificial gate provides structural support during processing, the sidewall spacers define precise boundaries, and the replacement gate delivers the desired electrical characteristics without compromising fabrication efficiency.
Data Source
AI summary
One illustrative method disclosed herein includes, among other things, forming a vertically oriented channel semiconductor structure, forming a layer of a bottom spacer material around the vertically oriented channel semiconductor structure and forming a sacrificial material layer above the layer of a bottom spacer material. In this example, the method further includes forming a sidewall spacer adjacent the vertically oriented channel semiconductor structure and above an upper surface of the sacrificial material layer, removing the sacrificial material layer so as to define a replacement gate cavity between a bottom surface of the sidewall spacer and the layer of a bottom spacer material, and forming a replacement gate structure in the replacement gate cavity.