Vertical Transistor ROM Cell with Unactivated Dopants
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Current ROM manufacturing techniques result in large cell sizes, limiting the amount of ROM that can be placed on a silicon chip due to real estate constraints.
Innovation Solution
The integration of a resistive element with a vertical transistor in ROM cells, where the resistive element is an undoped semiconductor layer with implanted dopants that are not substantially activated, allowing for programming by applying electrical pulses to activate the dopants and change the resistance of the ROM cell.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of stationary object
If traditional horizontal transistor structures are used in ROM cells, then the manufacturing process is well-established and reliable, but the cell size becomes large, limiting the amount of ROM that can be placed on a silicon chip
Solution Approach 1:
The patent transitions from traditional horizontal planar transistors to vertical transistors standing perpendicular to the substrate. This dimensional change allows the transistor channel to extend vertically through multiple layers, effectively utilizing the third dimension (height) rather than only the planar area, thereby reducing the footprint of each ROM cell while maintaining functionality.
Solution Approach 2:
The vertical transistor structure is nested within a multi-layer architecture where the channel extends through vertically stacked source and drain regions. The gate wraps around the channel in a cylindrical or planar configuration, creating a nested arrangement where control elements surround the conductive path, maximizing space utilization within the vertical column.
2Adaptability or versatility
If dopants are implanted in the semiconductor layer but not activated, then the ROM cell can be programmed by applying voltage to activate dopants and change resistance, but this requires additional programming steps and voltage application
Solution Approach 1:
Dopants are pre-implanted into the semiconductor layer during fabrication at locations where they will eventually form conductive channels, but they remain inactive (non-conductive) initially. This preliminary doping allows the device to be manufactured with all possible programming patterns already in place, and the actual programming is achieved by selectively activating these pre-positioned dopants through voltage application, rather than physically moving or adding material during programming.
Solution Approach 2:
The programming mechanism relies on changing the electrical state parameter of the implanted dopants from inactive to active through application of specific voltage thresholds. By controlling the magnitude and duration of applied voltages, the device can achieve different resistance states corresponding to multiple data values, enabling multistate or analog programming without changing the physical structure or dopant concentration.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces the die size of ROM cells, enabling more cells to be packed in a given area, while also allowing for multistate or analog values to be programmed, which is particularly useful in artificial intelligence applications.
Implementation Method 1
Dopants are implanted in the semiconductor layer, where the implanted dopants are not substantially activated
Implementation Method 2
An activation voltage is applied to one or more ROM cells to activate chemical dopants implanted in the one or more ROM cells. Activation of the chemical dopants changes a resistance of the ROM cell
Data Source
AI summary
Provided is a read-only memory (ROM) device. The ROM device comprises a substrate that has a plurality of vertical transport field effect transistors (VFETs). The ROM device further comprises an un-activated semiconductor layer provided on each VFET. The un-activated semiconductor layer includes implanted dopants that have not been substantially activated.