Vertical Transistor Structure for Short-Channel Reliability
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Solution Overview
Problem
Conventional transistors face challenges in miniaturization, high-density arrangement, and achieving reliable electrical characteristics, which affect display quality, especially in high-resolution applications like VR and AR devices, where variations in transistor electrical characteristics can degrade color and brightness.
Innovation Solution
A semiconductor device with a vertical field-effect transistor (VFET) structure, featuring a semiconductor layer in contact with conductive layers and insulating layers, including an oxide insulating film and an oxygen barrier layer, to reduce channel length and enhance electrical performance, allowing for high-density transistor arrangement and improved reliability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of moving object
If the channel length of a transistor is reduced to enable miniaturization, then the transistor area is reduced and high-density arrangement is achieved, but the electrical characteristics and reliability deteriorate due to short-channel effects
Solution Approach 1:
The patent transitions from a conventional planar transistor structure to a vertical field-effect transistor (VFET) structure where the channel extends in the vertical dimension rather than only laterally. This allows the channel length to be reduced in the lateral direction for miniaturization while maintaining sufficient effective channel length through vertical extension, thereby achieving both small area and good electrical characteristics
Solution Approach 2:
The patent employs a stacked-layer structure where multiple functional layers are nested vertically: the semiconductor layer is positioned between source and drain electrodes, with gate electrodes wrapping around or positioned above/below the channel region. This nested arrangement maximizes the use of vertical space to maintain channel length while minimizing lateral footprint
2Productivity
If transistors are arranged with high density to increase the number of transistors per unit area, then the pixel size can be reduced for high-resolution displays, but variations in electrical characteristics increase affecting color and brightness uniformity
Solution Approach 1:
By stacking transistor components vertically, the patent achieves high transistor density without increasing lateral crowding. This vertical integration allows transistors to be packed more tightly in the plane while maintaining adequate spacing and control, reducing variations in electrical characteristics
Solution Approach 2:
The patent divides the transistor structure into distinct functional segments (source region, channel region, drain region, gate regions) that can be independently optimized and controlled. This segmentation allows for better uniformity in electrical characteristics across densely packed transistors
3Area of moving object
If the transistor size is reduced to occupy smaller area in each pixel, then high-resolution display is achieved, but the current carrying capacity and electrical performance deteriorate
Solution Approach 1:
The vertical field-effect transistor structure extends the channel and current path in the vertical dimension, allowing sufficient current carrying capacity to be achieved within a reduced lateral footprint. The vertical channel provides adequate length for current flow while the compact lateral dimensions reduce the area occupied in each pixel
4Ease of manufacture
If conventional planar transistor structure is used, then manufacturing process is simpler, but further miniaturization and high-density arrangement cannot be achieved
Solution Approach 1:
The patent adopts a vertical field-effect transistor structure that extends transistor components in the vertical dimension. This dimensional change enables further miniaturization in the lateral direction while maintaining functional performance, achieving high-density arrangement without fundamentally complicating the manufacturing process
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution enables the creation of transistors with extremely short channel lengths, high reliability, and favorable electrical characteristics, enabling higher resolution and smaller pixel sizes, thus improving display quality and reliability in high-resolution displays.
Implementation Method 1
heat treatment is performed on the insulating layer that is in contact with the semiconductor layer
Implementation Method 2
the second layer includes an insulating film having an oxygen barrier property
Data Source
AI summary
A transistor that can be miniaturized and highly reliable is provided. A semiconductor device includes a transistor and a first insulating layer. The transistor includes first to third conductive layers, a semiconductor layer, and a second insulating layer. The first insulating layer includes a first layer and a second layer over the first layer. The first insulating layer is over the first conductive layer and includes a first opening reaching the first conductive layer. The second conductive layer is over the second layer. The semiconductor layer is in contact with the first and second conductive layers and with a side surface of the first layer inside the first opening. The second insulating layer covers the semiconductor layer in the first opening, and the third conductive layer covers the second insulating layer in the first opening. The first insulating layer includes a second opening at a position different from the first opening. The second insulating layer is in contact with the first layer inside the second opening. The first layer includes an oxide insulating film, and the second layer includes an insulating film having an oxygen barrier property.